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Remote Asic Physical Design Engineer Jobs (NOW HIRING)

K2 Space

Senior ASIC Physical Design Engineer

OR · On-site +1

$170K - $250K/yr

The Role We are seeking a Senior ASIC Physical Design Engineer to help implement advanced SoCs that power next-generation satellite and space systems. In this role, you will contribute to the full ...

K2 Space

Principal ASIC Physical Design Engineer

OR · On-site +1

$190K - $280K/yr

The Role We are looking for a Principal ASIC Physical Design Engineer to lead the implementation of complex SoCs for next-generation satellite and space systems. You will own the full physical design ...

K2 Space

Senior ASIC Physical Design Engineer

$170K - $250K/yr

The Role We are seeking a Senior ASIC Physical Design Engineer to help implement advanced SoCs that power next-generation satellite and space systems. In this role, you will contribute to the full ...

K2 Space

Principal ASIC Physical Design Engineer

$190K - $280K/yr

The Role We are looking for a Principal ASIC Physical Design Engineer to lead the implementation of complex SoCs for next-generation satellite and space systems. You will own the full physical design ...

MatX

ASIC/SOC CAD Engineer

Mountain View, CA · On-site +1

$175K - $362K/yr

MatX is seeking a Physical Design CAD Engineer to join our team as we create best-in-class silicon ... Remote Perks We work remotely Monday & Friday, supported by home-tech setup, and remote wifi ...

Positron AI

ASIC Physical Design Engineer, Principal

$150K - $300K/yr

Required Qualifications * 12+ years of experience in physical design, spanning floorplanning ... Remote-first culture with a company-provided computer and home office setup Compensation and future

IC Enable

RTL Design Engineer

Richardson, TX · On-site +1

$122K/yr

... mixed-signal, physical design, and product engineering teams. The RTL Design Engineer will ... Richardson, TX (Hybrid, Remote considered based on experience and qualifications) What You'll Do:

Purple Hires Inc

ASIC DFT Engineer

Plano, TX · Remote

Remote, (Onsite) Duration: Contract Year of Exp: 8+ yrs to 15 yrs. We are seeking a highly ... Collaborate with RTL design, verification, physical design, STA, and silicon validation teams to ...

Purple Hires Inc

ASIC Engineer - Remote

Plano, TX · Remote

... Lead ASIC DFT Engineer to architect, implement, verify, and debug advanced DFT solutions for ... Collaborate with RTL design, verification, physical design, STA, and silicon validation teams to ...

Meta

ASIC Engineer, Power

Sunnyvale, CA · On-site +1

$146K/yr

Collaborate with RTL design, physical design, and verification teams to identify and resolve power hotspots and inefficiencies across custom ASIC designs * Build and optimize EDA infrastructure ...

Meta

ASIC Engineer, Power

Austin, TX · On-site +1

$146K/yr

Collaborate with RTL design, physical design, and verification teams to identify and resolve power hotspots and inefficiencies across custom ASIC designs * Build and optimize EDA infrastructure ...

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Remote Asic Physical Design Engineer information

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$95K

$141.5K

How much do remote asic physical design engineer jobs pay per year?

As of Aug 23, 2026, the average yearly pay for remote asic physical design engineer in the United States is $139,408.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $140,000.00 per year, depending on experience, location, and employer.

What does a remote ASIC physical design engineer do?

A Remote ASIC Physical Design Engineer is responsible for transforming circuit designs into physical layouts that can be manufactured as integrated circuits (ICs), specifically Application-Specific Integrated Circuits (ASICs). Their role includes tasks such as floorplanning, placement, routing, timing analysis, and verifying that the physical design meets performance and power specifications. Working remotely, they collaborate with design and verification teams using specialized EDA (Electronic Design Automation) tools to optimize chip layouts for manufacturability and efficiency. Effective communication and expertise in physical design processes are essential for success in this role.

What are the key skills and qualifications needed to thrive as a remote ASIC physical design engineer?

To thrive as a Remote ASIC Physical Design Engineer, you need a strong background in digital logic design, ASIC implementation, and a relevant engineering degree. Proficiency with industry-standard EDA tools such as Synopsys, Cadence, or Mentor Graphics, as well as scripting languages like TCL and Python, is typically required. Excellent problem-solving, communication, and time management skills are vital for effective remote collaboration and project delivery. These skills and qualifications ensure high-quality chip designs, efficient workflow, and seamless teamwork in a distributed environment.

What are some common challenges faced by a remote ASIC physical design engineer, and how can they be addressed?

Remote ASIC Physical Design Engineers often encounter challenges related to communication and collaboration, especially when coordinating with cross-functional teams such as verification, synthesis, and EDA tool support. Time zone differences and limited face-to-face interaction can make it harder to quickly resolve design issues or clarify specifications. To overcome these challenges, engineers should leverage collaborative tools, maintain clear documentation, and proactively schedule regular check-ins with team members. Building strong virtual communication habits helps ensure smooth project execution and timely delivery of design milestones.
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Remote Asic Physical Design Engineer jobs near you
Infographic showing various Remote Asic Physical Design Engineer job openings in the United States as of August 2026, with employment types broken down into 82% Full Time, 6% Part Time, and 12% Contract. Highlights an 100% Remote job distribution, with an average salary of $139,408 per year, or $67 per hour.

Senior ASIC Physical Design Engineer

K2 Space

OR • On-site, Remote

$170K - $250K/yr

Full-time

Medical, Dental, Vision, Life, PTO

Re-posted 28 days ago

Job description

The Role 

We are seeking a Senior ASIC Physical Design Engineer to help implement advanced SoCs that power next-generation satellite and space systems. In this role, you will contribute to the full physical design flow-from synthesis to GDSII-working closely with architecture, RTL, verification, and packaging teams. You'll be a key contributor in achieving timing closure, optimizing PPA, and supporting design integration with external partners. You will be part of a collaborative design team developing state-of-the-art mixed-signal SoCs to be hosted on some of the largest, most powerful, rapidly designed and rapidly manufactured satellites ever deployed in space. In your first 6 months, you will develop and implement new SoC sub-systems for satellite communications and beyond. In your first two years, you will have contributed to developing cutting-edge SoCs that will fly in space. 

Responsibilities 

  • Execute the complete physical design flow for complex SoC blocks and top-level integration, including synthesis, floorplanning, place & route, CTS, STA, and physical verification. 
  • Perform timing closure and optimization across multiple corners and modes using industry-standard tools. 
  • Collaborate with front-end, verification, and DFT teams to ensure clean handoff and predictable convergence. 
  • Work with external physical design service providers and internal leads to review deliverables, resolve issues, and ensure schedule alignment. 
  • Develop and maintain scripts and automation to improve flow efficiency and consistency. 
  • Support physical sign-off activities including DRC/LVS, IR drop, EM, and power analysis. 
  • Assist in chip-level integration, ECOs, and tapeout preparation. 
  • Contribute to methodology development, tool evaluation, and flow documentation. 
  • Support your product through production and spaceflight.  

Required Qualifications 

  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field. 
  • 5-10 years of experience in ASIC physical design for complex SoCs. 
  • Hands-on experience with industry-standard tools (Synopsys ICC2/Fusion Compiler, Cadence Innovus, or equivalent). 
  • Strong understanding of timing analysis, power optimization, and physical verification flows. 
  • Experience with hierarchical or flat SoC design methodologies. 
  • Familiarity with FinFET technologies. 
  • Working knowledge of DFT, UPF/CPF power intent, and ECO implementation. 
  • Strong problem-solving skills and ability to work cross-functionally in fast-paced environments. 

Preferred Qualifications 

  • Exposure to radiation-hardened or space-qualified ASICs. 
  • Experience with chip-package co-design or advanced packaging (2.5D/3D). 
  • Familiarity with physical design service vendor management or offshore collaboration. 
  • Experience with sign-off through TSMC. 
  • Experience with Gate-All-Around technologies.  
  • Experience working in cross-functional, geographically distributed teams. 

Compensation and Benefits:

  • Base salary range for this role is $170,000 - $250,000 + equity in the company
  • Salary will be based on several factors including, but not limited to: knowledge and skills, education, and experience level
  • Comprehensive benefits package including paid time off, medical/dental/vision/ coverage, life insurance, paid parental leave, and many other perks
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About K2 Space

Sourced by ZipRecruiter

Industry

Guided missile and space vehicle manufacturing

Company size

11 - 50 Employees

Headquarters location

Los Angeles, CA, US

Year founded

2022

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