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Remote Asic Physical Design Engineer Jobs (NOW HIRING)

Nvidia

CPU Design Methodology Engineer

OR · On-site +1

... ASIC, Physical Design, CAD, Package Design, Software, DFT and other teams. What you'll be doing ... A Masters in Computer or Electrical Engineering or equivalent experience 8+ years of experience in ...

IC Enable

RTL Design Engineer

Richardson, TX · On-site +1

$122K/yr

... mixed-signal, physical design, and product engineering teams. The RTL Design Engineer will ... Richardson, TX (Hybrid, Remote considered based on experience and qualifications) What You'll Do:

Purple Hires Inc

ASIC DFT Engineer

Plano, TX · Remote

Remote, (Onsite) Duration: Contract Year of Exp: 8+ yrs to 15 yrs. We are seeking a highly ... Collaborate with RTL design, verification, physical design, STA, and silicon validation teams to ...

Purple Hires Inc

ASIC Engineer - Remote

Plano, TX · Remote

... Lead ASIC DFT Engineer to architect, implement, verify, and debug advanced DFT solutions for ... Collaborate with RTL design, verification, physical design, STA, and silicon validation teams to ...

Meta

ASIC Engineer, Power

Sunnyvale, CA · On-site +1

$146K/yr

Collaborate with RTL design, physical design, and verification teams to identify and resolve power hotspots and inefficiencies across custom ASIC designs * Build and optimize EDA infrastructure ...

Meta

ASIC Engineer, Power

Austin, TX · On-site +1

$146K/yr

Collaborate with RTL design, physical design, and verification teams to identify and resolve power hotspots and inefficiencies across custom ASIC designs * Build and optimize EDA infrastructure ...

Purple Hires Inc

Lead ASIC DFT Engineer

San Jose, CA · Remote

Title - Lead ASIC DFT Engineer Location - Remote (must be aligned with PST time zone) Below is the ... Collaborate with RTL design, verification, physical design, STA, and silicon validation teams to ...

K2 Space

Principal ASIC Design Verification Engineer

OR · On-site +1

$190K - $285K/yr

Work closely with architecture, RTL design, DFT, firmware, physical design, and silicon validation ... Engineering, or related field. * 10+ years of experience in ASIC/SoC verification. * Solid ...

K2 Space

Senior ASIC Design Verification Engineer

OR · On-site +1

$170K - $250K/yr

Work closely with architecture, RTL design, DFT, firmware, physical design, and silicon validation ... Engineering, or related field. * 5+ years of experience in ASIC/SoC verification. * Solid ...

Nvidia

Senior ASIC Design Engineer

OR · On-site +1

We are now looking for a Senior ASIC Design Engineer to join our System ASIC team. NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 fueled the growth of ...

K2 Space

Principal ASIC Design Verification Engineer

$190K - $285K/yr

Work closely with architecture, RTL design, DFT, firmware, physical design, and silicon validation ... Engineering, or related field. * 10+ years of experience in ASIC/SoC verification. * Solid ...

Purple Hires Inc

Lead ASIC DFT Engineer

Plano, TX · Remote

... Lead ASIC DFT Engineer to architect, implement, verify, and debug advanced DFT solutions for ... Collaborate with RTL design, verification, physical design, STA, and silicon validation teams to ...

K2 Space

Senior ASIC Design Verification Engineer

$170K - $250K/yr

Work closely with architecture, RTL design, DFT, firmware, physical design, and silicon validation ... Engineering, or related field. * 5+ years of experience in ASIC/SoC verification. * Solid ...

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Remote Asic Physical Design Engineer information

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$95K

$141.5K

How much do remote asic physical design engineer jobs pay per year?

As of Sep 13, 2026, the average yearly pay for remote asic physical design engineer in the United States is $139,408.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $140,000.00 per year, depending on experience, location, and employer.

What does a remote ASIC physical design engineer do?

A Remote ASIC Physical Design Engineer is responsible for transforming circuit designs into physical layouts that can be manufactured as integrated circuits (ICs), specifically Application-Specific Integrated Circuits (ASICs). Their role includes tasks such as floorplanning, placement, routing, timing analysis, and verifying that the physical design meets performance and power specifications. Working remotely, they collaborate with design and verification teams using specialized EDA (Electronic Design Automation) tools to optimize chip layouts for manufacturability and efficiency. Effective communication and expertise in physical design processes are essential for success in this role.

What are the key skills and qualifications needed to thrive as a remote ASIC physical design engineer?

To thrive as a Remote ASIC Physical Design Engineer, you need a strong background in digital logic design, ASIC implementation, and a relevant engineering degree. Proficiency with industry-standard EDA tools such as Synopsys, Cadence, or Mentor Graphics, as well as scripting languages like TCL and Python, is typically required. Excellent problem-solving, communication, and time management skills are vital for effective remote collaboration and project delivery. These skills and qualifications ensure high-quality chip designs, efficient workflow, and seamless teamwork in a distributed environment.

What are some common challenges faced by a remote ASIC physical design engineer, and how can they be addressed?

Remote ASIC Physical Design Engineers often encounter challenges related to communication and collaboration, especially when coordinating with cross-functional teams such as verification, synthesis, and EDA tool support. Time zone differences and limited face-to-face interaction can make it harder to quickly resolve design issues or clarify specifications. To overcome these challenges, engineers should leverage collaborative tools, maintain clear documentation, and proactively schedule regular check-ins with team members. Building strong virtual communication habits helps ensure smooth project execution and timely delivery of design milestones.
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Remote Asic Physical Design Engineer jobs near you
Infographic showing various Remote Asic Physical Design Engineer job openings in the United States as of September 2026, with employment types broken down into 79% Full Time, and 21% Contract. Highlights an 7% In-person, and 93% Remote job distribution, with an average salary of $139,408 per year, or $67 per hour.

CPU Design Methodology Engineer

OR • On-site, Remote

Nvidia
Computer and Electronic Product Manufacturing • 10K+ employees
Learn more about Nvidiaexternal

Full-time

Posted 15 days ago

Key responsibilities

  • Define and develop system-level methodologies and tools to build SOCs in an efficient and scalable manner.

  • Identify inefficiencies and improvement opportunities in the front-end chip implementation process and propose ideas to address them.

  • Own front-end design quality checks and reviews to present the physical design team with high-quality RTL.

Nvidia rating

9.6

Company rating: 9.6 out of 10

Based on 18 frontline employees who took The Breakroom Quiz

Job description

We are now looking for a Senior CPU Design Methodology Engineer. The complexity of chip development has greatly increased over the years. We are now packing tens of billions of transistors in a chip to meet the growing computing demand in a footprint that is responsible to our environment.

The NVIDIA CPU team is looking for a top ASIC Engineer with an interest in SOC design automation, RTL integration, and chip build and assembly. You should be passionate about developing methodologies and automation solutions that enable SOC creation in the most optimized way. In this position, you will get the chance to build complex chips and interact directly with unit-level ASIC, Physical Design, CAD, Package Design, Software, DFT and other teams.

What you'll be doing: Define and develop system-level methodologies and tools to build SOCs in an efficient and scalable manner Identify inefficiencies and improvement opportunities in the front-end chip implementation process and propose ideas to address them Own front-end design quality checks and reviews to present the physical design team with high-quality RTL What we need to see: A Masters in Computer or Electrical Engineering or equivalent experience 8+ years of experience in chip design, specializing in SOC integration and design automation Excellent analytical and problem-solving skills Experience in RTL design (Verilog), verification (UVM, System Verilog), System-On-Chip design/integration flow, and design automation Strong coding skills in Perl, Python, or other industry-standard scripting languages Experience in synthesis and physical design is a plus Good interpersonal skills. With competitive salaries and a generous benefits package, NVIDIA is widely considered to be one of the technology world's most desirable employers. We employ some of the most forward-thinking and hardworking people in the world.

Are you passionate about becoming a part of an outstanding team supporting the latest in CPU technology. If so, we want to hear from you. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.

The base salary range is 168,000 USD - 264,500 USD for Level 4, and 196,000 USD - 310,500 USD for Level 5. You will also be eligible for equity and benefits. Applications for this job will be accepted at least until August 22, 2026.

This posting is for an existing vacancy. NVIDIA uses AI tools in its recruiting processes. NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer.

As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

What Nvidia employees say

Pay

Benefits

Hours and flexibility

Workplace

Get the full story on Breakroom

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About Nvidia

Sourced by ZipRecruiter

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's fueled by great technology--and amazing people. Today, we're tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what's never been done before takes vision, innovation, and the world's best talent.

Industry

Computer and electronic product manufacturing

Company size

10,000+ Employees

Headquarters location

Santa Clara, CA, US

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