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Asic Physical Design Engineer Jobs (NOW HIRING)

K2 Space

OR

$170K - $250K/yr

The Role We are seeking a Senior ASIC Physical Design Engineer to help implement advanced SoCs that power next-generation satellite and space systems. In this role, you will contribute to the full ...

Jane Street

ASIC Physical Design Engineer

New York, NY · On-site

$148K - $153K/yr

About the Position We are looking to hire an ASIC Physical Design Engineer to help us design, test, and deploy advanced hardware. As part of our Ultra Low Latency team, you'll have the opportunity to ...

Jane Street

ASIC Physical Design Engineer

New York, NY

$148K - $153K/yr

About the Position We are looking to hire an ASIC Physical Design Engineer to help us design, test, and deploy advanced hardware. As part of our Ultra Low Latency team, you'll have the opportunity to ...

K2 Space

OR · On-site

$190K - $280K/yr

The Role We are looking for a Principal ASIC Physical Design Engineer to lead the implementation of complex SoCs for next-generation satellite and space systems. You will own the full physical design ...

K2 Space

Senior ASIC Physical Design Engineer

Seattle, WA · On-site

$170K - $250K/yr

The Role We are seeking a Senior ASIC Physical Design Engineer to help implement advanced SoCs that power next-generation satellite and space systems. In this role, you will contribute to the full ...

K2 Space

Senior ASIC Physical Design Engineer

Seattle, WA · On-site

$170K - $250K/yr

The Role We are seeking a Senior ASIC Physical Design Engineer to help implement advanced SoCs that power next-generation satellite and space systems. In this role, you will contribute to the full ...

K2 Space

Senior ASIC Physical Design Engineer

$170K - $250K/yr

The Role We are seeking a Senior ASIC Physical Design Engineer to help implement advanced SoCs that power next-generation satellite and space systems. In this role, you will contribute to the full ...

K2 Space

Principal ASIC Physical Design Engineer

$190K - $280K/yr

The Role We are looking for a Principal ASIC Physical Design Engineer to lead the implementation of complex SoCs for next-generation satellite and space systems. You will own the full physical design ...

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Asic Physical Design Engineer information

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$95K

$141.5K

How much do asic physical design engineer jobs pay per year?

As of Jul 14, 2026, the average yearly pay for asic physical design engineer in the United States is $139,408.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $140,000.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive in the Asic Physical Design Engineer position, and why are they important?

As an ASIC Physical Design Engineer, you need strong expertise in digital design, timing analysis, and semiconductor technology, often supported by a degree in electrical or computer engineering. Familiarity with EDA tools like Cadence, Synopsys, and Mentor Graphics for place-and-route, as well as relevant certifications in VLSI design, are highly valuable. Attention to detail, effective communication, and problem-solving abilities distinguish top professionals in this field. These competencies are crucial for ensuring accurate, efficient, and manufacturable ASIC designs in a fast-paced technological environment.

What are the typical daily responsibilities of an ASIC Physical Design Engineer?

As an ASIC Physical Design Engineer, your daily tasks often include translating RTL designs into physical layouts, performing place-and-route, running static timing analysis, and optimizing power, performance, and area metrics. You will frequently collaborate with design, verification, and fabrication teams to address design challenges and ensure seamless integration of IP blocks. Regular project meetings, documentation of design processes, and participation in design reviews are also common. This role involves balancing technical precision with teamwork, making communication skills and adaptability essential for success.

What is an ASIC Physical Design Engineer job?

An ASIC Physical Design Engineer is responsible for the back-end design and implementation of integrated circuits (ICs). They handle tasks such as floorplanning, placement, routing, timing closure, power optimization, and Design for Manufacturability (DFM). Using Electronic Design Automation (EDA) tools, they ensure the IC meets performance, power, and area (PPA) requirements. They collaborate with front-end design, verification, and fabrication teams to ensure a successful chip tape-out.

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Asic Physical Design Engineer jobs near you
ASIC Physical Design Engineer

ASIC Physical Design Engineer

StaffRight Associates, LLC

San Jose, CA • On-site

$159K - $164K/yr

Other

Retirement

Re-posted 27 days ago

Job description

***Candidates must be currently authorized to work in the United States on a full-time, permanent basis. StaffRight Associates and our clients do not provide visa sponsorship for this position.

PLEASE DO NOT APPLY IF YOU DO NOT MEET THESE ABOVE QUALIFICATIONS

Great base pay, bonus, terrific benefits and exceptional 401k!

he Mission

StaffRight Associates is recruiting to identify a high-caliber ASIC Physical Design Engineer to spearhead the structural realization of next-generation System-on-Chip (SoC) architectures. This role is not merely about execution; it is about the technical synthesis of complex silicon requirements into high-performance, tape-out-ready reality. You will bridge the gap between front-end architectural intent and physical silicon constraints, driving custom ASIC solutions that power emerging technologies. Within this high-stakes environment, you will own the end-to-end physical lifecycle, transforming abstract logic into optimized, high-performance hardware.

Core Technical Objectives

  • Formalize and validate pre-layout timing constraints to ensure architectural feasibility and systemic synchronization from the earliest stages of development.

  • Architect block-level and chip-level floorplans, optimizing pin assignments and spatial distribution to maximize silicon efficiency and signal integrity.

  • Orchestrate clock tree synthesis and complex clock specification reviews to ensure robust distribution across sophisticated SoC environments.

  • Optimize placement and routing protocols through iterative timing analysis, ensuring high-density integration without compromising performance.

  • Validate system resilience via rigorous sign-off procedures, including RC extraction, static timing analysis (STA), and IR-drop mitigation.

  • Engineer solutions for complex physical verification (PV) discrepancies, utilizing advanced debugging methodologies to ensure zero-defect tape-outs.

  • Synthesize technical findings into high-level presentations for strategic stakeholders, aligning engineering execution with client mission requirements.

Candidate DNA

  • Technical Depth: A minimum of 8–10+ years of hands-on mastery in custom ASIC physical design, with a proven history of navigating the full project lifecycle from inception to final tape-out.

  • Domain Expertise: Expert-level command of advanced process nodes (e.g., 28nm, 16nm, and below) and deep familiarity with hierarchical layout strategies.

  • Toolchain Proficiency: Advanced fluency in industry-standard physical design suites (ICC2/Innovus) and sign-off environments (PrimeTime, Redhawk, or equivalent IR-drop and STA platforms).

  • Computational Logic: Skilled in automating complex workflows and design-rule checks through precise scripting in Tcl, Perl, or Python.

  • Academic Foundation: Bachelor of Science in Electrical Engineering (BSEE) required; Master of Science (MSEE) preferred, with a focus on integrated circuit design or semiconductor physics.

  • Professional Pedigree: Ideally experienced within lean, high-impact engineering environments where independent ownership and "Goal-Execution-Mapping" are essential for project success.

Working with StaffRight Associates

At StaffRight Associates, we operate at the intersection of technical synthesis and structural alignment. We don’t just match resumes to keywords; we map your engineering DNA—your architectural philosophy, your approach to system resilience, and your "Goal-Execution-Mapping"—to the most sophisticated STEM challenges in the industry. When you partner with us, you are engaging with a team that speaks your language and understands the nuances of high-stakes innovation. We are committed to placing elite talent where their technical contributions drive systemic impact.

Apply