You'll be embedded into the IC Failure Analysis team and collaborate with IC & Package design teams, process & product engineering. Collaboratewith foundries and OSAT (Outsourced Semiconductor ...
You'll be embedded into the IC Failure Analysis team and collaborate with IC & Package design teams, process & product engineering. Collaboratewith foundries and OSAT (Outsourced Semiconductor ...
Photonic Packaging Engineer, Principal
San Jose, CA · On-site
$205K - $255K/yr
Collaborate with IC packaging, optical connector, and silicon photonics teams to achieve co-design optimization * Build and mentor a high-performing team of packaging engineers and scientists.
Photonic Packaging Engineer, Principal
San Jose, CA · On-site
$205K - $255K/yr
Collaborate with IC packaging, optical connector, and silicon photonics teams to achieve co-design optimization * Build and mentor a high-performing team of packaging engineers and scientists.
Staff Semi Packaging Engineer
San Jose, CA · On-site
$130K - $188K/yr
IC package design: design and optimize IC packages for a wide range of ADI products, using common ... Master's degree in Materials Science and Engineering, Applied Physics, Electrical Engineering, or ...
Staff Semi Packaging Engineer
San Jose, CA · On-site
$130K - $188K/yr
IC package design: design and optimize IC packages for a wide range of ADI products, using common ... Master's degree in Materials Science and Engineering, Applied Physics, Electrical Engineering, or ...
Package Integration Engineer
San Francisco, CA · On-site
$122K - $164K/yr
Looking for a senior level IC packaging engineer to develop exciting new products. You will be responsible providing Custom Silicon packaging solutions in a module/system for various consumer markets.
Package Integration Engineer
San Francisco, CA · On-site
$122K - $164K/yr
Looking for a senior level IC packaging engineer to develop exciting new products. You will be responsible providing Custom Silicon packaging solutions in a module/system for various consumer markets.
Staff Semi Packaging Engineer
$130K - $188K/yr
IC package design: design and optimize IC packages for a wide range of ADI products, using common ... Master's degree in Materials Science and Engineering, Applied Physics, Electrical Engineering, or ...
Staff Semi Packaging Engineer
$130K - $188K/yr
IC package design: design and optimize IC packages for a wide range of ADI products, using common ... Master's degree in Materials Science and Engineering, Applied Physics, Electrical Engineering, or ...
Engineering Group, Engineering Group > Packaging Engineering General Summary: This position is part of Qualcomm's Integrated Circuits (IC) Packaging organization and represents a senior leadership ...
Engineering Group, Engineering Group > Packaging Engineering General Summary: This position is part of Qualcomm's Integrated Circuits (IC) Packaging organization and represents a senior leadership ...
RFIC Packaging (Mechanical) Engineer
Lowell, MA · On-site
$83K - $136K/yr
RFIC Packaging Engineer Technical lead for RFIC package development, supporting NPI from concept ... Troubleshoot IC packaging defects, then define and implement solutions * Provide supplier ...
RFIC Packaging (Mechanical) Engineer
Lowell, MA · On-site
$83K - $136K/yr
RFIC Packaging Engineer Technical lead for RFIC package development, supporting NPI from concept ... Troubleshoot IC packaging defects, then define and implement solutions * Provide supplier ...
Senior Engineer, Semi Packaging Engineering
$103K - $143K/yr
Work with cross-functional team to develop advanced integrated circuit ("IC") packaging solutions ... Engineer or related occupation conceptualizing and productizing semiconductor devices to bridge ...
Senior Engineer, Semi Packaging Engineering
$103K - $143K/yr
Work with cross-functional team to develop advanced integrated circuit ("IC") packaging solutions ... Engineer or related occupation conceptualizing and productizing semiconductor devices to bridge ...
Principal Packaging Engineer Support new package design and development by providing direction to ... Define assembly process, troubleshoot and support IC packaging defects. * Provide supplier ...
Principal Packaging Engineer Support new package design and development by providing direction to ... Define assembly process, troubleshoot and support IC packaging defects. * Provide supplier ...
Senior Engineer, Semi Packaging Engineering
Wilmington, MA · On-site
$103K - $143K/yr
Work with cross-functional team to develop advanced integrated circuit ("IC") packaging solutions ... Engineer or related occupation conceptualizing and productizing semiconductor devices to bridge ...
Senior Engineer, Semi Packaging Engineering
Wilmington, MA · On-site
$103K - $143K/yr
Work with cross-functional team to develop advanced integrated circuit ("IC") packaging solutions ... Engineer or related occupation conceptualizing and productizing semiconductor devices to bridge ...
Packaging Engineer, Sr.
San Diego, CA · On-site
We are seeking a highly motivated Staff Packaging Engineer with the capability to lead advanced integrated circuit (IC) packaging development and manage the introduction of new product technologies.
Packaging Engineer, Sr.
San Diego, CA · On-site
We are seeking a highly motivated Staff Packaging Engineer with the capability to lead advanced integrated circuit (IC) packaging development and manage the introduction of new product technologies.
Principal Packaging Engineer Support new package design and development by providing direction to ... Define assembly process, troubleshoot and support IC packaging defects. * Provide supplier ...
Principal Packaging Engineer Support new package design and development by providing direction to ... Define assembly process, troubleshoot and support IC packaging defects. * Provide supplier ...
Package Integration Engineer
$184K - $324K/yr
Looking for a senior level IC packaging engineer to develop exciting new products. You will be responsible providing Custom Silicon packaging solutions in a module/system for various consumer markets.
Package Integration Engineer
$184K - $324K/yr
Looking for a senior level IC packaging engineer to develop exciting new products. You will be responsible providing Custom Silicon packaging solutions in a module/system for various consumer markets.
Packaging Assembly Engineer
Austin, TX · On-site
We are looking for a hardworking and passionate IC Packaging Assembly Engineer to join our team. In this highly visible role, you will own development, optimization and sustaining the advanced flip ...
Packaging Assembly Engineer
Austin, TX · On-site
We are looking for a hardworking and passionate IC Packaging Assembly Engineer to join our team. In this highly visible role, you will own development, optimization and sustaining the advanced flip ...
We are looking for a self-motivated Packaging Simulation Engineer who is proficient in FEM ... Description • In this role, you will be working on stress and deformation simulation of IC ...
We are looking for a self-motivated Packaging Simulation Engineer who is proficient in FEM ... Description • In this role, you will be working on stress and deformation simulation of IC ...
We are looking for a self-motivated Packaging Simulation Engineer who is proficient in FEM ... Description In this role, you will be working on stress and deformation simulation of IC packages ...
We are looking for a self-motivated Packaging Simulation Engineer who is proficient in FEM ... Description In this role, you will be working on stress and deformation simulation of IC packages ...
Senior IC Package Design Engineer Location: Santa Clara, CA (Onsite) Duration: 6 Months (Ongoing ... Familiarity with IC packaging technologies, materials, substrate design rules and assembly rules
Quick apply
Senior IC Package Design Engineer Location: Santa Clara, CA (Onsite) Duration: 6 Months (Ongoing ... Familiarity with IC packaging technologies, materials, substrate design rules and assembly rules
Photonic Packaging Engineer, Principal
San Jose, CA · On-site
$205K - $255K/yr
Collaborate with IC packaging, optical connector, and silicon photonics teams to achieve co-design optimization * Build and mentor a high-performing team of packaging engineers and scientists.
Photonic Packaging Engineer, Principal
San Jose, CA · On-site
$205K - $255K/yr
Collaborate with IC packaging, optical connector, and silicon photonics teams to achieve co-design optimization * Build and mentor a high-performing team of packaging engineers and scientists.
IC Package Engineer
$2.0K/mo
Leverage advanced packaging technologies, with expertise in CoWoS (Chip-on-Wafer-on-Substrate) and heterogeneous integration techniques, to design both open and closed packages, incorporating ...
IC Package Engineer
$2.0K/mo
Leverage advanced packaging technologies, with expertise in CoWoS (Chip-on-Wafer-on-Substrate) and heterogeneous integration techniques, to design both open and closed packages, incorporating ...
IC Package Engineer
$2.0K/mo
Leverage advanced packaging technologies, with expertise in CoWoS (Chip-on-Wafer-on-Substrate) and heterogeneous integration techniques, to design both open and closed packages, incorporating ...
IC Package Engineer
$2.0K/mo
Leverage advanced packaging technologies, with expertise in CoWoS (Chip-on-Wafer-on-Substrate) and heterogeneous integration techniques, to design both open and closed packages, incorporating ...
Ic Packaging Engineer information
See salary details
$19.71 - $24.02
2% of jobs
$24.02 - $28.32
6% of jobs
$32.42 is the 25th percentile. Wages below this are outliers.
$28.32 - $32.63
17% of jobs
$32.63 - $36.93
16% of jobs
The median wage is $39.08 / hr.
$36.93 - $41.24
16% of jobs
$41.24 - $45.54
12% of jobs
$47.59 is the 75th percentile. Wages above this are outliers.
$45.54 - $49.85
11% of jobs
$49.85 - $54.15
6% of jobs
$54.15 - $58.46
5% of jobs
$58.46 - $62.76
4% of jobs
$62.76 - $67.07
3% of jobs
$19
$42
$67
How much do ic packaging engineer jobs pay per hour?
What is an IC Packaging Engineer job?
An IC Packaging Engineer is responsible for designing and developing semiconductor packaging solutions to ensure the performance, reliability, and manufacturability of integrated circuits (ICs). They work closely with design, manufacturing, and testing teams to create packaging that meets thermal, electrical, and mechanical requirements. Their role includes material selection, process optimization, and collaboration with suppliers to enhance packaging efficiency and cost-effectiveness.
What are the key skills and qualifications needed to thrive in the Ic Packaging Engineer position, and why are they important?
To thrive as an IC Packaging Engineer, you need a robust background in materials science, semiconductor device physics, and mechanical or electrical engineering, typically supported by a relevant engineering degree. Proficiency in design and simulation tools like Cadence, ANSYS, and industry standards such as JEDEC, along with knowledge of thermal, electrical, and reliability testing methods, is essential. Effective communication, cross-functional teamwork, and strong problem-solving skills help you excel in project-based environments. These qualifications are critical for delivering reliable, high-performance integrated circuit packages essential to the semiconductor industry's success.
What are the typical daily responsibilities of an IC Packaging Engineer?
IC Packaging Engineers typically focus on designing, developing, and testing packaging solutions for integrated circuits, working closely with cross-functional teams including design, process, and reliability engineers. Day-to-day tasks may include creating layout drawings, performing simulations, evaluating material choices, resolving technical challenges during assembly, and interacting with manufacturing partners. They are responsible for ensuring the package design meets performance, cost, and reliability requirements set by customers or the market. This role often involves regular collaboration and problem-solving to meet tight development timelines and maintain product quality.

Nvidia rating
9.6
Based on 17 frontline employees who took The Breakroom Quiz
5th of 217 rated software companies
Job description
We are looking for an experienced Engineerwho will lead the development of rapid IC packaging of individual die, to enable Failure Analysis and NPI tasks ahead of high-volume manufacturing. This will include planning &drivingrelated R&D with multiple internal and external partners and you will be responsible for establishing advanced packaging processes needed to meet our NPI goals regarding packaging turn-around-time, reliability, and chip-package interaction. Prior knowledge of Package related Failure Analysis is beneficial.
What you will be doing:
Package Development & Prototyping:Drive the process, mechanical, thermal, and material evaluation ofthe latestIC packages. Manage rapid prototyping builds, package stack-ups, and assembly processes to bring new packaging architectures from concept to small volume for FA and NPI use cases.
Material Characterization:Pioneer new packaging & die-level processing methodologies and evaluateinnovativepackaging materials (e.g., molding compounds, substrates, adhesives).
Failure Analysis & Debug:Coordinate comprehensive physical and electrical failure analysis on prototype builds, reliability-tested components to determine root causes of failures.
Multi-functionalCollaboration:You'll be embedded into the IC Failure Analysis team and collaborate with IC & Package design teams, process & product engineering. Collaboratewith foundries and OSAT (Outsourced Semiconductor Assembly and Test) partners to develop & test the required processes, tooling, and workflows.
What we need to see:
B.S., M.S., or Ph.D., or equivalent experiencein Materials Science, Mechanical Engineering, Electrical Engineering, Physics, or a related semiconductor field.
Packaging Expertise:Deep understanding of flip-chip, 2.5D/3D packaging, wire bonding, and advanced substrate architectures.
Experience:12+ years of hands-on experience in IC packaging development and/or package design, NPI (New Product Introduction).
Design & Simulation Tools:Familiarity with IC package EDA software (e.g., Cadence Allegro Package Designer) and Finite Element Modeling (FEM) tools like ANSYS or ABAQUS is a strong plus.
FA Tooling Proficiency:At a minimum, you'll need basic understanding of advanced packaging related FA techniques and equipment, such as SEM, EDX, CSAM, X-Ray, and LIT.
With competitive salaries and a generous benefits package, we are widely considered to be one of the technology world's most desirable employers; we have some of the most forward-thinking and hardworking people in the world working for us and, due to unparalleled growth, best-in-class teams are rapidly growing. If you're creative and autonomous with a real passion for your work, we want to hear from you!
Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 168,000 USD - 270,250 USD for Level 5, and 216,000 USD - 345,000 USD for Level 6.You will also be eligible for equity and benefits.
This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes.
NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.About Nvidia
Sourced by ZipRecruiter
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's fueled by great technology--and amazing people. Today, we're tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what's never been done before takes vision, innovation, and the world's best talent.
Industry
Computer and electronic product manufacturing
Company size
10,000+ Employees
Headquarters location
Santa Clara, CA, US
Year founded
1993