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Ic Packaging Engineer Jobs (NOW HIRING)

Microsoft

Senior IC Packaging Engineer

Hillsboro, OR · On-site

$113K - $156K/yr

We are looking for a Senior IC Packaging Engineer to join the team. #SCHIE #CSME Responsibilities The Senior IC Package Engineer will be responsible for providing expertise, insight, and support to ...

Apple

IC Packaging Integration Engineer

Austin, TX · On-site

We are looking for versatile and passionate IC Packaging Engineer to join our team! Description • You will be responsible for IC packaging development • Work with cross-functional teams and lead ...

Qualcomm

Principal IC Packaging Engineer

San Diego, CA · On-site

We are seeking a highly motivated Principal IC Packaging Engineer to lead the development of advanced integrated circuit (IC) packaging technologies. This role focuses on spearheading new product ...

Axiado

Senior IC Packaging Engineer

San Jose, CA · On-site

$122K - $168K/yr

Axiado Corporation is seeking a Senior IC Packaging Engineer to provide technical leadership and architectural ownership of advanced IC and System-in-package(SiP) in a fast-growing startup ...

Axiado

Senior IC Packaging Engineer

San Jose, CA · On-site

$122K - $168K/yr

Axiado Corporation is seeking a Senior IC Packaging Engineer to provide technical leadership and architectural ownership of advanced IC and System-in-package(SiP) in a fast-growing startup ...

AvicenaTech

Senior IC Packaging Engineer

Sunnyvale, CA · On-site

... IC applications * Develop and maintain process control plans (SPC), DOEs, and yield improvement roadmaps for optical engine packaging and bumping modules * Partner with integration engineering to co ...

Apple

IC Packaging Integration Engineer

Austin, TX

$184K - $324K/yr

We are looking for versatile and passionate IC Packaging Engineer to join our team! Description • You will be responsible for IC packaging development • Work with cross-functional teams and lead ...

Apple

IC Packaging Integration Engineer

Austin, TX

$184K - $324K/yr

We are looking for versatile and passionate IC Packaging Engineer to join our team! Description • You will be responsible for IC packaging development • Work with cross-functional teams and lead ...

Broadcom

IC Package Design / Development

San Jose, CA · On-site

$159K/yr

... IC Packaging Engineer to drive next-generation package architecture, design, and productization ... using advanced node silicon (7nm, 5nm, 3nm and beyond). This role partners closely with chip design ...

Broadcom, Inc.

IC Package Design / Development

San Jose, CA · On-site

$159K/yr

... IC Packaging Engineer to drive next-generation package architecture, design, and productization ... using advanced node silicon (7nm, 5nm, 3nm and beyond). This role partners closely with chip design ...

Broadcom

IC Package Design / Development

Irvine, CA · On-site

$146K/yr

... IC Packaging Engineer to drive next-generation package architecture, design, and productization ... using advanced node silicon (7nm, 5nm, 3nm and beyond). This role partners closely with chip design ...

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How much do ic packaging engineer jobs pay per hour?

As of Jul 24, 2026, the average hourly pay for ic packaging engineer in the United States is $42.37, according to ZipRecruiter salary data. Most workers in this role earn between $32.69 and $49.28 per hour, depending on experience, location, and employer.

What is an IC Packaging Engineer job?

An IC Packaging Engineer is responsible for designing and developing semiconductor packaging solutions to ensure the performance, reliability, and manufacturability of integrated circuits (ICs). They work closely with design, manufacturing, and testing teams to create packaging that meets thermal, electrical, and mechanical requirements. Their role includes material selection, process optimization, and collaboration with suppliers to enhance packaging efficiency and cost-effectiveness.

What are the key skills and qualifications needed to thrive in the Ic Packaging Engineer position, and why are they important?

To thrive as an IC Packaging Engineer, you need a robust background in materials science, semiconductor device physics, and mechanical or electrical engineering, typically supported by a relevant engineering degree. Proficiency in design and simulation tools like Cadence, ANSYS, and industry standards such as JEDEC, along with knowledge of thermal, electrical, and reliability testing methods, is essential. Effective communication, cross-functional teamwork, and strong problem-solving skills help you excel in project-based environments. These qualifications are critical for delivering reliable, high-performance integrated circuit packages essential to the semiconductor industry's success.

What are the typical daily responsibilities of an IC Packaging Engineer?

IC Packaging Engineers typically focus on designing, developing, and testing packaging solutions for integrated circuits, working closely with cross-functional teams including design, process, and reliability engineers. Day-to-day tasks may include creating layout drawings, performing simulations, evaluating material choices, resolving technical challenges during assembly, and interacting with manufacturing partners. They are responsible for ensuring the package design meets performance, cost, and reliability requirements set by customers or the market. This role often involves regular collaboration and problem-solving to meet tight development timelines and maintain product quality.

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What cities are hiring for Ic Packaging Engineer jobs? Cities with the most Ic Packaging Engineer job openings:
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Infographic showing various Ic Packaging Engineer job openings in the United States as of July 2026, with employment types broken down into 96% Full Time, 1% Part Time, and 3% Contract. Highlights an 87% Physical, 5% Hybrid, and 8% Remote job distribution, with an average salary of $88,120 per year, or $42.4 per hour.
Senior IC Packaging Engineer

Senior IC Packaging Engineer

Microsoft

Hillsboro, OR • On-site

$113K - $156K/yr

Full-time

Posted 15 days ago

Microsoft rating

8.5

Company rating: 8.5 out of 10

Based on 131 frontline employees who took The Breakroom Quiz

69th of 217 rated software companies

Job description

Overview
Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft's expanding Cloud Infrastructure and responsible for powering Microsoft's "Intelligent Cloud" mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for passionate engineers to help achieve that mission.
The Compute Silicon & Manufacturing Engineering (CSME) organization within SCHIE is responsible for design, development, manufacturing and packaging of Microsoft's state-of-the-art computer chips, notably the Azure Cobalt. Our solutions provide sustainable strategic advantage to Microsoft and enable our customers to achieve more.
As Microsoft's cloud business continues to grow the ability to deploy new offerings and hardware infrastructure on time, in high volume with high quality and lowest cost is of paramount importance. To achieve this goal, the Silicon Manufacturing & Package Engineering (SMPE)team is instrumental in defining and delivering operational measures of success for hardware manufacturing, improving the planning process, quality, delivery, scale and sustainability related to Microsoft cloud hardware. We are looking for engineers with a passion for customer focused solutions, insight and industry knowledge to envision and implement future technical solutions that will manage and optimize the Cloud infrastructure.
We are looking for a Senior IC Packaging Engineer to join the team.
#SCHIE #CSME
Responsibilities
TheSenior IC Package Engineer will be responsible for providing expertise, insight, and support to the Silicon device development team through the entire life cycle of the product. In this role, you will be responsible for supporting the design and implementation of new custom Silicon devices, evaluation and recommendation of new packaging technology, Substrate design support, device/package qualification, supplier assessment, manufacturing bring up, and driving quality/reliability in development and production.
Specific responsibilities to include:
  • Drive optimal silicon packaging solution supporting Azure datacenter product roadmap.
  • Drive package technology for chiplet architecture with advanced 2.5D/3D packaging.
  • Drive 2.5D/3D packaging product designs (bridge/interposer/substrate) from definition, development to tapeout
  • Define, design and develop test vehicles to validate Silicon, Package, System performance.
  • Drive supplier assessments and manage suppliers through definition, development, qualification and production.
  • Develop and deliver FMEA (Failure Mode and Effects Analysis) for various technology options.
  • Define EDA tools requirements for advanced 3DIC packaging designs
  • Design and develop package and assembly drawings to support the manufacturing.
  • Lead supplier assessments and manage suppliers through definition, development, qualification and production.
  • Assess and characterize the reliability of Integrated Circuits (IC) packages.
  • Design and develop package and assembly drawings to support the manufacturing.
  • Work closely with silicon and platform architects, motherboard and package designers, thermal architects and engineers, and power and performance engineers.
  • Drive execution of architecture solutions across product lines or multiple product groups and across teams that account for design trends and future concepts by leveraging cross-functional expertise, industry best practices, and lessons learned from teams working across multiple product lines.
  • Drive engineering system design decisions that require collaboration between internal and external stakeholders to account for platform-specific technology decisions and develop system models based on current and anticipated feature/design needs and trade-offs.

Qualifications
  • Required Qualifications:
    • Doctorate in Electrical Engineering, Computer Engineering, Computer Science, Physics, Chemistry or related field AND 1+ year(s) technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, Physics, Chemistry or related field AND 4+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, Physics, Chemistry or related field AND 5+ years technical engineering experience OR equivalent experience.

    Other Requirements:
    • Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.
    • This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate's citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable.

    Preferred Qualifications:
    • Doctorate in Physics, Electrical Engineering, Computer Engineering, Computer Science, Chemistry, or related field AND 3+ years technical engineering experience OR Master's Degree in Physics, Electrical Engineering, Computer Engineering, Computer Science, Chemistry, or related field AND 6+ years technical engineering experience OR Bachelor's Degree in Physics, Electrical Engineering, Computer Engineering, Computer Science, Chemistry, or related field AND 8+ years technical engineering experience OR equivalent experience.
    • Master's Degree with 10 years experience in semiconductor package product development
    • 5+ years hands-on experience in Semiconductor Package development, manufacturing, supplier management or quality management
    • Specific experience with Advanced Semiconductor Package technologies (e.g. BGA/2.5D/3D)
    • Foundation in advanced packaging technologies, manufacturing and supplier management
    • Proficient in IC package or PCB board layout CAD tools Cadence Allegro*
    • Working knowledge in high-speed signaling, layout, electrical, mechanical and thermal co-designs.
    • Working knowledge in 2D and 3D simulation tools for full package layout extractions for power and signals analysis
    • Experience with OSAT, Supplier & Foundry technologies.
    • Experience in physical failure analysis
    • Experience in subcontract supplier management.
    • Strong verbal and written communication.
    • Record of success in cross-functional team environment

    #SCHIE #CSME

Silicon Engineering IC4 - The typical base pay range for this role across the U.S. is USD $119,800 - $234,700 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $160,200 - $261,000 per year.
Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here:
https://careers.microsoft.com/us/en/us-corporate-pay
This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled.
Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance with religious accommodations and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations.

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About Microsoft

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Our infrastructure is comprised of a large global portfolio of more than 100 datacenters and 1 million servers. Our foundation is built upon and managed by a team of subject matter experts working to support services for more than 1 billion customers and 20 million businesses in over 90 countries worldwide. With environmental sustainability and optimization at the forefront of our datacenter design and operations, we continue to grow and evolve as we meet the ever-changing business demands that hold Microsoft as a world-class cloud provider.

Industry

Computer and computer peripheral equipment and software wholesalers

Company size

10,000+ Employees

Headquarters location

Redmond, WA, US

Year founded

1975

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