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Ic Packaging Engineer Jobs in Oregon (NOW HIRING)

Staff RFIC Design Engineer

Hillsboro, OR ยท On-site +1

$144K - $187K/yr

Switch/LNA/RF IC Design Engineer, the design of GaAs/SOI/SiGe/CMOS based switch and LNA or RFIC ... More information on the Total Rewards package can be shared upon request. #LI-SM1 MAKE A DIFFERENCE ...

Staff RFIC Design Engineer

Bend, OR ยท On-site +1

$144K - $187K/yr

Switch/LNA/RF IC Design Engineer, the design of GaAs/SOI/SiGe/CMOS based switch and LNA or RFIC ... More information on the Total Rewards package can be shared upon request. #LI-SM1 MAKE A DIFFERENCE ...

Applications Development Engineer

Hillsboro, OR ยท On-site

$102 - $173.40/hr

... packaging, printed circuit boards and flat panel displays. The innovative ideas and devices that ... These products are essential for the IC manufacturers as they provide critical metrology ...

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Ic Packaging Engineer information

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$20

$44

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How much do ic packaging engineer jobs pay per hour?

As of Aug 23, 2026, the average hourly pay for ic packaging engineer in Oregon is $44.79, according to ZipRecruiter salary data. Most workers in this role earn between $34.57 and $52.12 per hour, depending on experience, location, and employer.

What is an IC Packaging Engineer?

An IC Packaging Engineer is responsible for designing and developing semiconductor packaging solutions to ensure the performance, reliability, and manufacturability of integrated circuits (ICs). They work closely with design, manufacturing, and testing teams to create packaging that meets thermal, electrical, and mechanical requirements. Their role includes material selection, process optimization, and collaboration with suppliers to enhance packaging efficiency and cost-effectiveness.

What does an IC Packaging Engineer do?

IC Packaging Engineers typically focus on designing, developing, and testing packaging solutions for integrated circuits, working closely with cross-functional teams including design, process, and reliability engineers. Day-to-day tasks may include creating layout drawings, performing simulations, evaluating material choices, resolving technical challenges during assembly, and interacting with manufacturing partners. They are responsible for ensuring the package design meets performance, cost, and reliability requirements set by customers or the market. This role often involves regular collaboration and problem-solving to meet tight development timelines and maintain product quality.

What are the key skills and qualifications needed to thrive as an IC Packaging Engineer?

To thrive as an IC Packaging Engineer, you need a robust background in materials science, semiconductor device physics, and mechanical or electrical engineering, typically supported by a relevant engineering degree. Proficiency in design and simulation tools like Cadence, ANSYS, and industry standards such as JEDEC, along with knowledge of thermal, electrical, and reliability testing methods, is essential. Effective communication, cross-functional teamwork, and strong problem-solving skills help you excel in project-based environments. These qualifications are critical for delivering reliable, high-performance integrated circuit packages essential to the semiconductor industry's success.

What job categories do people searching Ic Packaging Engineer jobs in Oregon look for?

The top searched job categories for Ic Packaging Engineer jobs in Oregon are:

Infographic showing various Ic Packaging Engineer job openings in Oregon as of August 2026, with employment types broken down into 89% Full Time, 8% Part Time, and 3% Contract. Highlights an 85% Physical, 6% Hybrid, and 9% Remote job distribution, with an average salary of $93,168 per year, or $44.8 per hour.

IC Packaging Design Engineer

Comprehensive Resources Inc.

Hillsboro, OR โ€ข On-site

$148K/yr

Other

Posted 4 days ago


Job description

Role : IC Packaging Design Engineer
LOC: Chandler, AZ or Hillsboro, OR (ONSITE)
Experience : !0+ years

Skills Required : -
Bachelor s or Master s degree in Electrical /Electronics Engineering
Experience Tier: Senior-level (primary); Mid-level (secondary)
Senior-Level: ~10+ years in IC packaging / package design
Mid-Level: 4-6+ years (MS) or 6+ years (BS) in IC packaging / package design
Strong hands-on experience in Siemens (Mentor) Xpedition (XPD); Alternatively: Cadence Allegro/Advanced Package Designer (APD / SiP)
Experience :-


Strong hands-on experience in Siemens (Mentor) Xpedition (XPD); Alternatively: Cadence Allegro/Advanced Package Designer (APD / SiP)
Candidates should have experience in the below domains:
Physical Design & Layout
Substrate design and layout
SI/PI aware design implementation
Design for performance, manufacturability, yield, and reliability
Design rule compliance