1

Google Asic Design Engineer Jobs in Arizona (NOW HIRING)

FPGA Design Engineer II

Tucson, AZ

$116K - $160K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

As an FPGA Design Engineer II you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques

New

FPGA Engineer

Tucson, AZ · On-site

$122K - $157K/yr

... • FPGA/ASIC design (VHDL coding) or FPGA/ASIC verification (SystemVerilog coding with UVM) • Xilinx or Microsemi devices and flow tools • Delivering FPGA/ASIC solutions to system level ...

FPGA Design Engineer II

Tucson, AZ

$116K - $160K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

As an FPGA Design Engineer II you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques

New

FPGA Design Engineer II

Tucson, AZ · On-site

$116K - $160K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

As an FPGA Design Engineer II you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques

FPGA Design Engineer II

Phoenix, AZ

$122K - $168K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

As an FPGA Design Engineer II you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques

New

DFT Application Engineer

Phoenix, AZ · On-site

  • Medical

  • Retirement

  • PTO

Hands-on experience in Design Implementation and methodology (ASIC design, Fullchip Integration ... Experience providing technical direction to engineering teams and customer support * Customer ...

Hands-on experience in Design Implementation and methodology (ASIC design, Fullchip Integration ... Experience providing technical direction to engineering teams and customer support * Customer ...

Principal Engineer

Chandler, AZ · On-site

$160 - $190/hr

Perform semiconductor engineering design, development, and testing for firm products and devices in ... ASIC design verification; * Regression management and artifact tracking; * C-based test development;

FPGA Design Engineer II with Security Clearance

Tucson, AZ · On-site

$114K - $157K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

As an FPGA Design Engineer II you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques

New

Master degree in Electrical Engineering, Computer Engineering, Electrical and Computer Engineering ... Knowledge of the CMOS ASIC design flow. Job Type:Experienced Hire Shift:Shift 1 (United States of ...

Senior Digital Engineer

Chandler, AZ · On-site +1

$133K/yr

Work closely with Analog and Verification engineers to deliver high-quality silicon solutions ... Strong understanding of ASIC design methodology. * Strong understanding of Lint, CDC & RDC tools.

Senior Digital Engineer

Chandler, AZ · On-site

$133K/yr

Work closely with Analog and Verification engineers to deliver high-quality silicon solutions ... Strong understanding of ASIC design methodology. * Strong understanding of Lint, CDC & RDC tools.

Senior Digital Engineer

Chandler, AZ · On-site +1

$133K/yr

Work closely with Analog and Verification engineers to deliver high-quality silicon solutions ... Strong understanding of ASIC design methodology. * Strong understanding of Lint, CDC & RDC tools.

Showing results 41-60

Google Asic Design Engineer information

See Arizona salary details

$87.6K

$140K

$188.2K

How much do google asic design engineer jobs pay per year?

As of Aug 16, 2026, the average yearly pay for google asic design engineer in Arizona is $139,965.00, according to ZipRecruiter salary data. Most workers in this role earn between $122,500.00 and $167,700.00 per year, depending on experience, location, and employer.

What is the difference between Google Asic Design Engineer vs Google FPGA Design Engineer?

AspectGoogle Asic Design EngineerGoogle FPGA Design Engineer
Required CredentialsBachelor's/Master's in Electrical Engineering or Computer Engineering; experience in ASIC designBachelor's/Master's in Electrical Engineering or Computer Engineering; FPGA design experience
Work EnvironmentDesigning custom silicon chips for Google productsDeveloping and testing FPGA prototypes for hardware acceleration
Employer & Industry UsagePrimarily in semiconductor and hardware design teams at GoogleHardware prototyping and acceleration teams at Google

The main difference between a Google Asic Design Engineer and a Google FPGA Design Engineer lies in their focus: ASIC engineers design custom chips for optimized performance, while FPGA engineers develop flexible hardware prototypes using field-programmable gate arrays. Both roles require strong electrical engineering skills but serve different stages of hardware development.

How does a Google ASIC Design Engineer typically collaborate with cross-functional teams during the chip development process?

As a Google ASIC Design Engineer, you will work closely with teams such as architecture, verification, software, and hardware validation to ensure successful chip delivery. Collaboration often involves regular meetings to align on design specifications, resolve integration issues, and discuss performance optimization. Effective communication is essential, as you’ll need to translate requirements from system architects into detailed hardware designs and provide feedback to verification and validation teams. This cross-functional interaction fosters a dynamic work environment and helps ensure the final product meets Google's rigorous standards.

What does a Google ASIC Design Engineer do?

A Google ASIC Design Engineer is responsible for designing and developing custom integrated circuits, known as Application-Specific Integrated Circuits (ASICs), that power Google's data centers, cloud infrastructure, and consumer devices. Their work involves collaborating with cross-functional teams to define requirements, create architecture, perform logic and physical design, and validate the silicon before production. They use advanced design tools and methodologies to ensure high performance, low power consumption, and reliability. Ultimately, their contributions help improve the efficiency and capabilities of Google's hardware products.

What are the key skills and qualifications needed to thrive as a Google ASIC Design Engineer, and why are they important?

To thrive as a Google ASIC Design Engineer, you need a strong background in electrical engineering, digital logic design, and experience with ASIC development, typically backed by a relevant degree. Familiarity with hardware description languages (such as Verilog or VHDL), EDA tools (like Synopsys or Cadence), and an understanding of SoC architectures are essential, and related certifications can be valuable. Strong problem-solving skills, attention to detail, and effective teamwork and communication abilities help set candidates apart. These skills are crucial for designing reliable, high-performance ASICs that meet Google's specifications and project timelines.

What job categories do people searching Google Asic Design Engineer jobs in Arizona look for?

The top searched job categories for Google Asic Design Engineer jobs in Arizona are:

What cities in Arizona are hiring for Google Asic Design Engineer jobs?

Cities in Arizona with the most Google Asic Design Engineer job openings:

Infographic showing various Google Asic Design Engineer job openings in Arizona as of August 2026, with employment types broken down into 6% As Needed, 72% Full Time, and 22% Contract. Highlights an 94% In-person, and 6% Remote job distribution, with an average salary of $139,965 per year, or $67.3 per hour.

Principal FPGA/ASIC Engineer - Level 3

Northrop Grumman Corporation

Gilbert, AZ • On-site

$79K - $118K/yr

Full-time

Medical, Dental, Vision, Life, Retirement, PTO

Re-posted 3 days ago


Northrop Grumman rating

8.2

Company rating: 8.2 out of 10

Based on 363 frontline employees who took The Breakroom Quiz

88th of 540 rated manufacturers


Job description

RELOCATION ASSISTANCE: No relocation assistance available
CLEARANCE REQUIRED FOR START: No
CLEARANCE TYPE: None
TRAVEL: Yes, 10% of the TimeDescription
At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work - and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history.
Northrop Grumman's Space Systems Sector has openings for a Principal FPGA/ASIC Engineer - Level 3 to join our team in Gilbert, AZ.
*This position description does not represent a current opening but may be used to identify candidates with skills and experience for positions within Northrop Grumman that frequently become available. Candidates who express an interest may be considered for future positions at Northrop Grumman*
The Principal FPGA/ASIC Engineer will be responsible for research, requirements analysis and systems architecture, design, coding, test bench design, verification, synthesis and place & route for our Command and Data Handling (C&DH) products. The ideal candidate will have demonstrated expertise in FPGA/ASIC for space applications.
Job responsibilities include, but are not limited to, the following:
  • HDL design for FPGA and/or ASIC applications
  • FPGA/ASIC verification via simulation and emulation (lab testing)
  • FPGA/ASIC synthesis, timing analysis, and place & route
  • FPGA design for space environments or space applications

Basic Qualifications:
  • Bachelor's degree in a STEM (Science, Technology, Engineering, and Mathematics) discipline with 5+ years of FPGA design (or related) engineering experience OR Master's degree in a STEM discipline with 3+ years of FPGA design (or related) engineering experience OR Ph.D. in a STEM discipline with 1+ year(s) of FPGA design (or related) engineering experience
  • Prior work experience in HDL design for an aerospace environment or space application
  • Proficiency in FPGA design flow including items such as RTL/gate level simulation, synthesis, place & route, static timing analysis, and power analysis
  • Industry experience in FPGA Design, Simulation and V&V
  • Must be able and willing to obtain and maintain an active DoD Top Secret clearance

Preferred Qualifications:
  • Advance degree in Electrical or Computer Engineering
  • Active DoD Top Secret clearance
  • Experience with Electronic Design Automation (EDA) Tools (e.g., Xilinx ISE/Vivado, Mentor Graphics ModelSim/QuestaSim, Synplify)
  • Implementation of Digital Signal or Image Processing algorithms on FPGAs
  • Expertise achieving timing closure on FPGA designs and generating test benches for full functional simulation
  • Experience working with or developing test benches using System Verilog and Universal Verification Methodology (UVM)
  • Experience debugging down to the hardware level with experience using Signal Generators, Logic Analyzers, Digital Oscilloscopes and Embedded FPGA Debugging tools

*This position description does not represent a current opening but may be used to identify candidates with skills and experience for positions within Northrop Grumman that frequently become available. Candidates who express an interest may be considered for future positions at Northrop Grumman*
Curious about all the exciting developments with the Northrop Grumman Space Sector? Click the link below:
https://www.northropgrumman.com/space.
Working at Northrop Grumman is more than just a paycheck. We offer a comprehensive Total Rewards and benefits package designed to help you thrive at work and in life. For more information on our Total Rewards package, please visit our Total Rewards site: Northrop Grumman Total Rewards.
As a full-time employee of Northrop Grumman, you are eligible for:
-Medical, Dental & Vision coverage
-401k
-Educational Assistance
-Life Insurance
-Employee Assistance Programs & Work/Life Solutions
-Paid Time Off
-Health & Wellness Resources
-Employee Discounts
-Flexible Schedules: for example, the ability to work a 9/80 work schedule, which allows an employee to work a nine-hour day Monday through Thursday and take every other Friday off of work.
Primary Level Salary Range: $79,300.00 - $118,900.00
The above salary range represents a general guideline; however, Northrop Grumman considers a number of factors when determining base salary offers such as the scope and responsibilities of the position and the candidate's experience, education, skills and current market conditions.
Depending on the position, employees may be eligible for overtime, shift differential, and a discretionary bonus in addition to base pay. Annual bonuses are designed to reward individual contributions as well as allow employees to share in company results. Employees in Vice President or Director positions may be eligible for Long Term Incentives. In addition, Northrop Grumman provides a variety of benefits including health insurance coverage, life and disability insurance, savings plan, Company paid holidays and paid time off (PTO) for vacation and/or personal business.
The application period for the job is estimated to be 20 days from the job posting date. However, this timeline may be shortened or extended depending on business needs and the availability of qualified candidates.
Northrop Grumman is an Equal Opportunity Employer, making decisions without regard to race, color, religion, creed, sex, sexual orientation, gender identity, marital status, national origin, age, veteran status, disability, or any other protected class. For our complete EEO and pay transparency statement, please visit http://www.northropgrumman.com/EEO. U.S. Citizenship is required for all positions with a government clearance and certain other restricted positions.

What Northrop Grumman employees say

Pay

Benefits

Hours and flexibility

Workplace

Get the full story on Breakroom


Northrop Grumman logo

About Northrop Grumman

Sourced by ZipRecruiter

At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work - and we have an insatiable drive to do what others think is impossible.

Industry

Space research administration

Company size

10,000+ Employees

Headquarters location

Falls Church, VA, US

Year founded

1939