FPGA Design Engineer II
$114K - $157K/yr
As an FPGA Design Engineer II you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques
FPGA Design Engineer II
$114K - $157K/yr
As an FPGA Design Engineer II you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques
FPGA Design Engineer II
$105K - $145K/yr
As an FPGA Design Engineer II you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques
FPGA Design Engineer II
$105K - $145K/yr
As an FPGA Design Engineer II you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques
FPGA Design Engineer II
$114K - $157K/yr
As an FPGA Design Engineer II you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques
FPGA Design Engineer II
$114K - $157K/yr
As an FPGA Design Engineer II you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques
FPGA Design Engineer II
$110K - $151K/yr
As an FPGA Design Engineer II you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques
FPGA Design Engineer II
$110K - $151K/yr
As an FPGA Design Engineer II you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques
FPGA Engineer
Tucson, AZ · On-site
$122K - $157K/yr
... • FPGA/ASIC design (VHDL coding) or FPGA/ASIC verification (SystemVerilog coding with UVM) • Xilinx or Microsemi devices and flow tools • Delivering FPGA/ASIC solutions to system level ...
FPGA Engineer
Tucson, AZ · On-site
$122K - $157K/yr
... • FPGA/ASIC design (VHDL coding) or FPGA/ASIC verification (SystemVerilog coding with UVM) • Xilinx or Microsemi devices and flow tools • Delivering FPGA/ASIC solutions to system level ...
FPGA Design Engineer II
$114K - $157K/yr
As an FPGA Design Engineer II you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques
FPGA Design Engineer II
$114K - $157K/yr
As an FPGA Design Engineer II you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques
FPGA Design Engineer II
$105K - $145K/yr
As an FPGA Design Engineer II you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques
FPGA Design Engineer II
$105K - $145K/yr
As an FPGA Design Engineer II you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques
FPGA Design Engineer II
$105K - $145K/yr
As an FPGA Design Engineer II you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques
FPGA Design Engineer II
$105K - $145K/yr
As an FPGA Design Engineer II you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques
FPGA Design Engineer II
$122K - $168K/yr
As an FPGA Design Engineer II you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques
FPGA Design Engineer II
$122K - $168K/yr
As an FPGA Design Engineer II you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques
FPGA Design Engineer II
$105K - $145K/yr
As an FPGA Design Engineer II you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques
FPGA Design Engineer II
$105K - $145K/yr
As an FPGA Design Engineer II you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques
FPGA Design Engineer II
$105K - $145K/yr
As an FPGA Design Engineer II you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques
FPGA Design Engineer II
$105K - $145K/yr
As an FPGA Design Engineer II you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques
FPGA Design Engineer II
$114K - $157K/yr
As an FPGA Design Engineer II you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques
FPGA Design Engineer II
$114K - $157K/yr
As an FPGA Design Engineer II you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques
FPGA Design Engineer II
$109K - $150K/yr
As an FPGA Design Engineer II you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques
FPGA Design Engineer II
$109K - $150K/yr
As an FPGA Design Engineer II you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques
FPGA Design Engineer II
$114K - $157K/yr
As an FPGA Design Engineer II you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques
FPGA Design Engineer II
$114K - $157K/yr
As an FPGA Design Engineer II you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques
FPGA Design Engineer II
$113K - $156K/yr
As an FPGA Design Engineer II you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques
FPGA Design Engineer II
$113K - $156K/yr
As an FPGA Design Engineer II you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques
FPGA Design Engineer II
$118K - $163K/yr
As an FPGA Design Engineer II you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques
FPGA Design Engineer II
$118K - $163K/yr
As an FPGA Design Engineer II you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques
FPGA Design Engineer II
$105K - $145K/yr
As an FPGA Design Engineer II you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques
FPGA Design Engineer II
$105K - $145K/yr
As an FPGA Design Engineer II you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques
FPGA Design Engineer II
$116K - $160K/yr
As an FPGA Design Engineer II you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques
FPGA Design Engineer II
$116K - $160K/yr
As an FPGA Design Engineer II you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques
FPGA Design Engineer II
$105K - $145K/yr
As an FPGA Design Engineer II you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques
FPGA Design Engineer II
$105K - $145K/yr
As an FPGA Design Engineer II you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques
FPGA Design Engineer II
$118K - $162K/yr
As an FPGA Design Engineer II you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques
FPGA Design Engineer II
$118K - $162K/yr
As an FPGA Design Engineer II you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design experience in one or more of the following areas: * Radar processing techniques
Google Asic Design Engineer information
See Arizona salary details
$87.6K - $96.7K
16% of jobs
$96.7K - $105.9K
3% of jobs
$105.9K - $115K
4% of jobs
$117.7K is the 25th percentile. Wages below this are outliers.
$115K - $124.2K
6% of jobs
The median wage is $130K / yr.
$124.2K - $133.3K
33% of jobs
$133.3K - $142.5K
3% of jobs
$142.5K - $151.6K
2% of jobs
$157.7K is the 75th percentile. Wages above this are outliers.
$151.6K - $160.8K
12% of jobs
$160.8K - $169.9K
5% of jobs
$169.9K - $179.1K
4% of jobs
$179.1K - $188.2K
12% of jobs
$87.6K
$140K
$188.2K
How much do google asic design engineer jobs pay per year?
As of Sep 5, 2026, the average yearly pay for google asic design engineer in Arizona is $139,965.00, according to ZipRecruiter salary data. Most workers in this role earn between $122,500.00 and $167,700.00 per year, depending on experience, location, and employer.
What does a Google ASIC Design Engineer do?
A Google ASIC Design Engineer is responsible for designing and developing custom integrated circuits, known as Application-Specific Integrated Circuits (ASICs), that power Google's data centers, cloud infrastructure, and consumer devices. Their work involves collaborating with cross-functional teams to define requirements, create architecture, perform logic and physical design, and validate the silicon before production. They use advanced design tools and methodologies to ensure high performance, low power consumption, and reliability. Ultimately, their contributions help improve the efficiency and capabilities of Google's hardware products.
How does a Google ASIC Design Engineer typically collaborate with cross-functional teams during the chip development process?
As a Google ASIC Design Engineer, you will work closely with teams such as architecture, verification, software, and hardware validation to ensure successful chip delivery. Collaboration often involves regular meetings to align on design specifications, resolve integration issues, and discuss performance optimization. Effective communication is essential, as you’ll need to translate requirements from system architects into detailed hardware designs and provide feedback to verification and validation teams. This cross-functional interaction fosters a dynamic work environment and helps ensure the final product meets Google's rigorous standards.
What are the key skills and qualifications needed to thrive as a Google ASIC Design Engineer, and why are they important?
To thrive as a Google ASIC Design Engineer, you need a strong background in electrical engineering, digital logic design, and experience with ASIC development, typically backed by a relevant degree. Familiarity with hardware description languages (such as Verilog or VHDL), EDA tools (like Synopsys or Cadence), and an understanding of SoC architectures are essential, and related certifications can be valuable. Strong problem-solving skills, attention to detail, and effective teamwork and communication abilities help set candidates apart. These skills are crucial for designing reliable, high-performance ASICs that meet Google's specifications and project timelines.
What is the difference between Google Asic Design Engineer vs Google FPGA Design Engineer?
| Aspect | Google Asic Design Engineer | Google FPGA Design Engineer |
|---|---|---|
| Required Credentials | Bachelor's/Master's in Electrical Engineering or Computer Engineering; experience in ASIC design | Bachelor's/Master's in Electrical Engineering or Computer Engineering; FPGA design experience |
| Work Environment | Designing custom silicon chips for Google products | Developing and testing FPGA prototypes for hardware acceleration |
| Employer & Industry Usage | Primarily in semiconductor and hardware design teams at Google | Hardware prototyping and acceleration teams at Google |
The main difference between a Google Asic Design Engineer and a Google FPGA Design Engineer lies in their focus: ASIC engineers design custom chips for optimized performance, while FPGA engineers develop flexible hardware prototypes using field-programmable gate arrays. Both roles require strong electrical engineering skills but serve different stages of hardware development.
Are Google ASIC Design Engineers in demand?
ASIC Design Engineers at Google are in high demand due to the growing need for specialized hardware acceleration and efficient chip designs in data centers and AI applications. Skills in digital design, verification, and hardware description languages like Verilog or VHDL are highly valued, and the role often requires experience with EDA tools and FPGA prototyping. The demand is expected to remain strong as companies continue to develop custom chips for performance and energy efficiency.
How much does a Google ASIC Design Engineer make?
A Google ASIC Design Engineer typically earns a base salary ranging from $120,000 to $200,000 annually, with total compensation often including bonuses and stock options. Compensation varies based on experience, location, and level within the company, and the role requires expertise in hardware design, verification, and EDA tools.
What is the salary of Google ASIC Design Engineer in Google?
The salary for a Google ASIC Design Engineer typically ranges from $120,000 to $200,000 annually, depending on experience, location, and level within the company. Compensation may also include bonuses, stock options, and benefits, reflecting industry standards for specialized hardware design roles at major tech companies.
What are popular job titles related to Google Asic Design Engineer jobs in Arizona?
For Google Asic Design Engineer jobs in Arizona, the most frequently searched job titles are:
What job categories do people searching Google Asic Design Engineer jobs in Arizona look for?
The top searched job categories for Google Asic Design Engineer jobs in Arizona are:
What cities in Arizona are hiring for Google Asic Design Engineer jobs?
Cities in Arizona with the most Google Asic Design Engineer job openings:
$114K - $157K/yr
Full-time
Medical, Dental, Vision, Life, Retirement, PTO
Posted 23 days ago
RTX rating
8.2
Based on 86 frontline employees who took The Breakroom Quiz
38th of 72 rated aerospace companies
Job description
Date Posted:
2026-08-12Country:
United States of AmericaLocation:
US-AZ-TUCSON-M02 ~ 1151 E Hermans Rd ~ BLDG M02Position Role Type:
OnsiteU.S. Citizen, U.S. Person, or Immigration Status Requirements:
Active and transferable U.S. government issued security clearance is required prior to start date. U.S. citizenship is required, as only U.S. citizens are eligible for a security clearanceSecurity Clearance Type:
DoD Clearance: SecretSecurity Clearance Status:
Ability to obtain INTERIM U.S. government issued security clearance is required prior to start dateAt RTX, the world's largest aerospace and defense company, 185,000 great minds are united by purpose and inspired to make a difference solving the world’s most complex problems. With our three market leading businesses, world-class operations and investments in research and development, we offer capabilities and opportunity no one else can. Together, we push the boundaries of known science and find new ways to connect and protect our world.
At Raytheon, the foundation of everything we do is rooted in our values and a higher calling – to help our nation and allies defend freedoms and deter aggression. We bring the strength of more than 100 years of experience and renowned engineering expertise to meet the needs of today’s mission and stay ahead of tomorrow’s threat. Our team solves tough, meaningful problems that create a safer, more secure world.
As an FPGA Design Engineer II you will develop FPGA designs for all major vendors and device families including: Xilinx, Altera, and Microsemi. Designs are implemented using VHDL for the following applications: gigabit serial interfaces, Radio Frequency (RF) and Electro-Optical (EO) DSP, controls, data links, embedded processing and processor interfaces.
Designers work with circuit card designers and systems engineers to develop requirements, architect new parts, collaborative modeling of algorithms, partition and perform code development, simulation, and place and route. Designs are verified against requirements using both directed test and constrained random methodologies. Design support is expected from requirements definition through integration and test. Design documentation and configuration management are required.
What You Will Do
-
Design and deliver production quality FPGA releases from initial proof of concept up to production
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Architect FPGA-based systems to determine parts, interfaces, and Concept of Operations (CONOPS)
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Translate system level requirements into FPGA requirements
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Design and code in VHDL for reliability and maintainability
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Verify designs utilizing self-checking techniques with directed and constrained random tests, while tracking functional and code coverage
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Help drive projects and execute to program schedules on time and budget
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Create complete documentation including requirements, verification plan, and user’s guides
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May lead small teams and mentor junior engineers
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May support internal and external technical reviews
Qualifications You Must Have
-
Typically requires a degree in Science, Technology, Engineering or Mathematics (STEM) and a minimum of 2 years of prior relevant experience
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Experience with VHDL and/or Verilog coding
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Experience with Xilinx or Microsemi devices and flow tools
Qualifications We Prefer
-
FPGA/ASIC design experience in one or more of the following areas:
-
Radar processing techniques
-
Image processing techniques for visual and infrared sensors
-
Embedded systems design using ARM, Microblaze, or Nios processors
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Gigabit serial interfaces and multi-gigabit transceivers (MGTs)
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Constrained random verification in UVM using System Verilog
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Verification utilizing emulation platforms, such as Veloce
What We Offer
-
Our values drive our actions, behaviors, and performance with a vision for a safer, more connected world. At RTX we value: Safety, Trust, Respect, Accountability, Collaboration, and Innovation.
-
Relocation Assistance!
-
9/80 Schedule
Learn More & Apply Now!
Please ensure the role type defined below is appropriate for your needs before applying to this role. This position is classified as:
Onsite: Employees who are working in Onsite roles will work primarily onsite. This includes all production and maintenance employees, as they are essential to the development of our products.
Tucson, AZ: https://careers.rtx.com/global/en/raytheon-tucson,-az-location
As part of our commitment to maintaining a secure hiring process, candidates may be asked to attend select steps of the interview process in-person at one of our office locations, regardless of whether the role is designated as on-site, hybrid or remote.
The salary range for this role is 68,900 USD - 131,100 USD. The salary range provided is a good faith estimate representative of all experience levels. RTX considers several factors when extending an offer, including but not limited to, the role, function and associated responsibilities, a candidate’s work experience, location, education/training, and key skills. Hired applicants may be eligible for benefits, including but not limited to, medical, dental, vision, life insurance, short-term disability, long-term disability, 401(k) match, flexible spending accounts, flexible work schedules, employee assistance program, Employee Scholar Program, parental leave, paid time off, and holidays. Specific benefits are dependent upon the specific business unit as well as whether or not the position is covered by a collective-bargaining agreement. Hired applicants may be eligible for annual short-term and/or long-term incentive compensation programs depending on the level of the position and whether or not it is covered by a collective-bargaining agreement. Payments under these annual programs are not guaranteed and are dependent upon a variety of factors including, but not limited to, individual performance, business unit performance, and/or the company’s performance. This role is a U.S.-based role. If the successful candidate resides in a U.S. territory, the appropriate pay structure and benefits will apply. RTX anticipates the application window closing approximately 40 days from the date the notice was posted. However, factors such as candidate flow and business necessity may require RTX to shorten or extend the application window.RTX is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability or veteran status, or any other applicable state or federal protected class. RTX provides affirmative action in employment for qualified Individuals with a Disability and Protected Veterans in compliance with Section 503 of the Rehabilitation Act and the Vietnam Era Veterans’ Readjustment Assistance Act.
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About RTX
Sourced by ZipRecruiter
Industry
Guided missile and space vehicle manufacturing, it services, aerospace product and parts manufacturing and engineering professional services
Company size
10,000+ Employees
Headquarters location
Waltham, MA, US