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Google Asic Design Engineer Jobs in Arizona (NOW HIRING)

Section Lead-Effector Digital Products

Tucson, AZ · On-site

$128K/yr

Typically requires a degree in Science, Technology, Engineering or Mathematics (STEM) and a minimum of 8 years of prior relevant experience * FPGA or ASIC design and/or verification * Integration and ...

Staff Digital Design Engineer

Chandler, AZ · On-site

$133K/yr

For over four decades, Cirrus Logic has been propelled by the top engineers in mixed-signal ... Exposure to low-power and high-performance ASIC design techniques. * Experience with back-end flows ...

Senior Digital Design Engineer

Chandler, AZ · On-site

$133K/yr

For over four decades, Cirrus Logic has been propelled by the top engineers in mixed-signal ... Exposure to low-power and high-performance ASIC design techniques. * Experience with back-end flows ...

Typically requires a degree in Science, Technology, Engineering or Mathematics (STEM) and a minimum of 8 years of prior relevant experience * FPGA or ASIC design and/or verification * Integration and ...

Typically requires a degree in Science, Technology, Engineering or Mathematics (STEM) and a minimum of 8 years of prior relevant experience * FPGA or ASIC design and/or verification * Integration and ...

FPGA Design Engineer II

Tucson, AZ · On-site

$69 - $131/hr

We bring the strength of more than 100 years of experience and renowned engineering expertise to ... FPGA/ASIC design experience in one or more of the following areas: Radar processing techniques

Showing results 21-40

Google Asic Design Engineer information

See Arizona salary details

$87.6K

$140K

$188.2K

How much do google asic design engineer jobs pay per year?

As of Sep 6, 2026, the average yearly pay for google asic design engineer in Arizona is $139,965.00, according to ZipRecruiter salary data. Most workers in this role earn between $122,500.00 and $167,700.00 per year, depending on experience, location, and employer.

What does a Google ASIC Design Engineer do?

A Google ASIC Design Engineer is responsible for designing and developing custom integrated circuits, known as Application-Specific Integrated Circuits (ASICs), that power Google's data centers, cloud infrastructure, and consumer devices. Their work involves collaborating with cross-functional teams to define requirements, create architecture, perform logic and physical design, and validate the silicon before production. They use advanced design tools and methodologies to ensure high performance, low power consumption, and reliability. Ultimately, their contributions help improve the efficiency and capabilities of Google's hardware products.

How does a Google ASIC Design Engineer typically collaborate with cross-functional teams during the chip development process?

As a Google ASIC Design Engineer, you will work closely with teams such as architecture, verification, software, and hardware validation to ensure successful chip delivery. Collaboration often involves regular meetings to align on design specifications, resolve integration issues, and discuss performance optimization. Effective communication is essential, as you’ll need to translate requirements from system architects into detailed hardware designs and provide feedback to verification and validation teams. This cross-functional interaction fosters a dynamic work environment and helps ensure the final product meets Google's rigorous standards.

What are the key skills and qualifications needed to thrive as a Google ASIC Design Engineer, and why are they important?

To thrive as a Google ASIC Design Engineer, you need a strong background in electrical engineering, digital logic design, and experience with ASIC development, typically backed by a relevant degree. Familiarity with hardware description languages (such as Verilog or VHDL), EDA tools (like Synopsys or Cadence), and an understanding of SoC architectures are essential, and related certifications can be valuable. Strong problem-solving skills, attention to detail, and effective teamwork and communication abilities help set candidates apart. These skills are crucial for designing reliable, high-performance ASICs that meet Google's specifications and project timelines.

What is the difference between Google Asic Design Engineer vs Google FPGA Design Engineer?

AspectGoogle Asic Design EngineerGoogle FPGA Design Engineer
Required CredentialsBachelor's/Master's in Electrical Engineering or Computer Engineering; experience in ASIC designBachelor's/Master's in Electrical Engineering or Computer Engineering; FPGA design experience
Work EnvironmentDesigning custom silicon chips for Google productsDeveloping and testing FPGA prototypes for hardware acceleration
Employer & Industry UsagePrimarily in semiconductor and hardware design teams at GoogleHardware prototyping and acceleration teams at Google

The main difference between a Google Asic Design Engineer and a Google FPGA Design Engineer lies in their focus: ASIC engineers design custom chips for optimized performance, while FPGA engineers develop flexible hardware prototypes using field-programmable gate arrays. Both roles require strong electrical engineering skills but serve different stages of hardware development.

Are Google ASIC Design Engineers in demand?

ASIC Design Engineers at Google are in high demand due to the growing need for specialized hardware acceleration and efficient chip designs in data centers and AI applications. Skills in digital design, verification, and hardware description languages like Verilog or VHDL are highly valued, and the role often requires experience with EDA tools and FPGA prototyping. The demand is expected to remain strong as companies continue to develop custom chips for performance and energy efficiency.

How much does a Google ASIC Design Engineer make?

A Google ASIC Design Engineer typically earns a base salary ranging from $120,000 to $200,000 annually, with total compensation often including bonuses and stock options. Compensation varies based on experience, location, and level within the company, and the role requires expertise in hardware design, verification, and EDA tools.

What is the salary of Google ASIC Design Engineer in Google?

The salary for a Google ASIC Design Engineer typically ranges from $120,000 to $200,000 annually, depending on experience, location, and level within the company. Compensation may also include bonuses, stock options, and benefits, reflecting industry standards for specialized hardware design roles at major tech companies.

What are popular job titles related to Google Asic Design Engineer jobs in Arizona?

For Google Asic Design Engineer jobs in Arizona, the most frequently searched job titles are:

What job categories do people searching Google Asic Design Engineer jobs in Arizona look for?

The top searched job categories for Google Asic Design Engineer jobs in Arizona are:

What cities in Arizona are hiring for Google Asic Design Engineer jobs?

Cities in Arizona with the most Google Asic Design Engineer job openings:

Infographic showing various Google Asic Design Engineer job openings in Arizona as of August 2026, with employment types broken down into 6% As Needed, 72% Full Time, and 22% Contract. Highlights an 94% In-person, and 6% Remote job distribution, with an average salary of $139,965 per year, or $67.3 per hour.

Technical Business Development Manager - ASIC & Semiconductor

Chelsea Search Group

Phoenix, AZ • On-site

$90 - $150/hr

Other

Posted 11 days ago


Job description

Technical Business Development Manager - ASIC & Semiconductor
  • Phoenix, AZ
Technical Business Development Manager

We are seeking an experienced Business Development professional to help drive the growth of our custom and standard product business. This is an exciting opportunity for a technically strong, customer-focused professional who can bridge engineering expertise with business development and help bring innovative semiconductor solutions to market. You will work closely with customers across the Mil-Aero, Industrial, and Medical markets to understand their technical challenges, identify opportunities, and develop solutions leveraging expertise in areas such as Design Automation, FPGA, ASIC Design, and advanced Packaging. In this role, you will collaborate with engineering, product development, and leadership teams to evaluate customer requirements, define technical approaches, and develop estimates for the resources, effort, and costs associated with potential new business opportunities. You will also have the opportunity to influence internal processes by identifying challenges and recommending improvements to design methodologies, tools, and workflows. The ideal candidate is a technically savvy business development professional who enjoys working directly with customers, understands complex engineering concepts, and can translate customer needs into compelling technical and business opportunities. If you’re looking for a role where your technical expertise, customer relationships, and business development skills can directly contribute to company growth, this is an opportunity to make a meaningful impact.

Essential Duties and Qualifications:
  • Close business by providing technical sales support during various stages of the sales cycle.
  • Contribute to the development of the overall ASIC architecture.
  • Develop long-term relationships with clients, through managing and interpreting their requirements.
  • Develop technical and cost proposals.
  • Make technical presentations and demonstrate how a product meets client needs.
  • Meet regular sales targets and coordinate sales projects.
  • Provide pre-sales technical assistance and product education.
  • Responsible for presales technical engagements.
  • Responsible for understanding the technical requirements and forecasts realistic customer requirements.
  • Search for new clients who might benefit from company products or services and grow business with existing customers.
  • Support business case development.
  • Support marketing activities by attending trade shows, conferences, and other marketing events.
  • Support of the IC Design, Test, and Product teams during the development.
  • Travel up to 30% is anticipated. Ability to work with customers to understand their high-level requirements and design solutions.
  • Work collaboratively with other members of the sales team and other technical experts.
Required Qualifications:
  • BSEE/MSEE or equivalent.
  • 3+ years of experience in Design Automation, FPGA, or ASIC Design.
  • 5+ years of experience in the Semiconductor industry. Advanced degrees will be considered with fewer years of experience.
  • Candidates must possess excellent organizational skills, good English oral and written communications skills, and a high level of interpersonal skills.
  • Experience working with Mil-Aero customers and/or Industrial customers a plus.
  • Experience working with systems that include some of the following: linear and switching voltage regulators, high/low side power switches, digital drivers, amplifiers, ADCs, SPI, CAN, microprocessors, thermal considerations, EMC considerations.
  • Leadership qualities: Integrity, attention to detail, goal oriented, and motivated to improve.
  • Must be a self-motivated team player with the ability to work in a customer oriented, fast-paced, and demanding environment with minimal supervision.
  • Must have strong technical documentation and verbal communication skills.
  • Proven track record of documenting technical requirements.
  • Skilled in use of common computer applications - Word, Excel, PowerPoint, etc.
  • Understanding of analog, digital, and mixed-signal design fundamentals.
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