CPU Core RTL Design Engineer
Austin, TX · On-site
As a CPU Core RTL Design Engineer, you will help design and optimize next-generation high ... Experience with Verilog/SystemVerilog RTL development in CPU, SoC, or ASIC environments * Strong ...
Austin, TX · On-site
As a CPU Core RTL Design Engineer, you will help design and optimize next-generation high ... Experience with Verilog/SystemVerilog RTL development in CPU, SoC, or ASIC environments * Strong ...
Austin, TX · On-site
As a CPU Core RTL Design Engineer, you will help design and optimize next-generation high ... Experience with Verilog/SystemVerilog RTL development in CPU, SoC, or ASIC environments * Strong ...
San Diego, CA · On-site
If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. This is an exciting position in the world class ...
San Diego, CA · On-site
If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. This is an exciting position in the world class ...
Beaverton, OR · On-site
If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. This is an exciting position in the world class ...
Beaverton, OR · On-site
If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. This is an exciting position in the world class ...
Santa Clara, CA · On-site
As an ASIC Design Engineer, you will build powerful SoC and GPU products. These products support ... Crafting micro-architecture, implementing them in RTL, and delivering fully verified, synthesis ...
Santa Clara, CA · On-site
As an ASIC Design Engineer, you will build powerful SoC and GPU products. These products support ... Crafting micro-architecture, implementing them in RTL, and delivering fully verified, synthesis ...
## ASIC Design Engineer - New College Grad 2026Applylocations: US, CA, Santa Claratime type: Full ... Day to day tasks include: writing readable high performance and low power RTL, Synthesis and Timing ...
## ASIC Design Engineer - New College Grad 2026Applylocations: US, CA, Santa Claratime type: Full ... Day to day tasks include: writing readable high performance and low power RTL, Synthesis and Timing ...
Santa Clara, CA · On-site
As an ASIC Design Engineer, you will build powerful SoC and GPU products. These products support ... Crafting micro-architecture, implementing them in RTL, and delivering fully verified, synthesis ...
Santa Clara, CA · On-site
As an ASIC Design Engineer, you will build powerful SoC and GPU products. These products support ... Crafting micro-architecture, implementing them in RTL, and delivering fully verified, synthesis ...
As an ASIC Design Engineer, you will build powerful SoC and GPU products. These products support ... Crafting micro-architecture, implementing them in RTL, and delivering fully verified, synthesis ...
As an ASIC Design Engineer, you will build powerful SoC and GPU products. These products support ... Crafting micro-architecture, implementing them in RTL, and delivering fully verified, synthesis ...
Irvine, CA · On-site
... RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. Description Develop signal processing intensive design for wireless communication SoCs ...
Irvine, CA · On-site
... RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. Description Develop signal processing intensive design for wireless communication SoCs ...
As a CPU Core RTL Design Engineer, you will help design and optimize next-generation high ... Experience with Verilog/SystemVerilog RTL development in CPU, SoC, or ASIC environments * Strong ...
As a CPU Core RTL Design Engineer, you will help design and optimize next-generation high ... Experience with Verilog/SystemVerilog RTL development in CPU, SoC, or ASIC environments * Strong ...
$129K - $194K/yr
Description As an ASIC Design Engineer in the Pixel IP design team, you will work closely with ... Preferred Qualifications Knowledge of front-end ASIC RTL digital logic design using Verilog or ...
$129K - $194K/yr
Description As an ASIC Design Engineer in the Pixel IP design team, you will work closely with ... Preferred Qualifications Knowledge of front-end ASIC RTL digital logic design using Verilog or ...
$122K - $214K/yr
... RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. Description Develop signal processing intensive design for wireless communication SoCs ...
$122K - $214K/yr
... RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. Description Develop signal processing intensive design for wireless communication SoCs ...
$122K - $214K/yr
... RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. Description Develop signal processing intensive design for wireless communication SoCs ...
$122K - $214K/yr
... RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. Description Develop signal processing intensive design for wireless communication SoCs ...
$122K - $214K/yr
... RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. Description Develop signal processing intensive design for wireless communication SoCs ...
$122K - $214K/yr
... RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. Description Develop signal processing intensive design for wireless communication SoCs ...
Austin, TX · On-site
$134K - $164K/yr
The NVIDIA System-On-Chip (SOC) group is looking for an entry level ASIC Verification Engineer! In ... Strong understanding of RTL design (Verilog). * Good understanding of computer architecture ...
Austin, TX · On-site
$134K - $164K/yr
The NVIDIA System-On-Chip (SOC) group is looking for an entry level ASIC Verification Engineer! In ... Strong understanding of RTL design (Verilog). * Good understanding of computer architecture ...
Austin, TX · On-site
$134K - $164K/yr
The NVIDIA System-On-Chip (SOC) group is looking for an entry level ASIC Verification Engineer. In ... Strong understanding of RTL design (Verilog). Good understanding of computer architecture ...
Austin, TX · On-site
$134K - $164K/yr
The NVIDIA System-On-Chip (SOC) group is looking for an entry level ASIC Verification Engineer. In ... Strong understanding of RTL design (Verilog). Good understanding of computer architecture ...
SoC Design Engineer Job Duties: Responsible for digital design and verification of image sensor and ... Execute ASIC implementation tasks including RTL coding, simulation, synthesis, formal verification ...
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SoC Design Engineer Job Duties: Responsible for digital design and verification of image sensor and ... Execute ASIC implementation tasks including RTL coding, simulation, synthesis, formal verification ...
Santa Clara, CA · On-site
$156K - $160K/yr
Description Job Title: SoC Design Engineer Job Duties: Responsible for digital design and ... Execute ASIC implementation tasks including RTL coding, simulation, synthesis, formal verification ...
Santa Clara, CA · On-site
$156K - $160K/yr
Description Job Title: SoC Design Engineer Job Duties: Responsible for digital design and ... Execute ASIC implementation tasks including RTL coding, simulation, synthesis, formal verification ...
Santa Clara, CA · On-site
$156K - $160K/yr
SoC Design Engineer Job Duties: Responsible for digital design and verification of image sensor and ... Execute ASIC implementation tasks including RTL coding, simulation, synthesis, formal verification ...
Santa Clara, CA · On-site
$156K - $160K/yr
SoC Design Engineer Job Duties: Responsible for digital design and verification of image sensor and ... Execute ASIC implementation tasks including RTL coding, simulation, synthesis, formal verification ...
Santa Clara, CA · On-site
$156K - $160K/yr
SoC Design Engineer Job Duties: Responsible for digital design and verification of image sensor and ... Execute ASIC implementation tasks including RTL coding, simulation, synthesis, formal verification ...
Santa Clara, CA · On-site
$156K - $160K/yr
SoC Design Engineer Job Duties: Responsible for digital design and verification of image sensor and ... Execute ASIC implementation tasks including RTL coding, simulation, synthesis, formal verification ...
Cupertino, CA · On-site
$129K - $194K/yr
ASIC Design and Integration Engineer - Silicon Security Cupertino, California, United States ... RTL design experience using Verilog or SystemVerilog. * Experience with CDC (Clock Domain Crossing ...
Cupertino, CA · On-site
$129K - $194K/yr
ASIC Design and Integration Engineer - Silicon Security Cupertino, California, United States ... RTL design experience using Verilog or SystemVerilog. * Experience with CDC (Clock Domain Crossing ...
$94K - $103.8K
16% of jobs
$103.8K - $113.6K
3% of jobs
$113.6K - $123.5K
4% of jobs
$126.3K is the 25th percentile. Wages below this are outliers.
$123.5K - $133.3K
6% of jobs
The median wage is $139.4K / yr.
$133.3K - $143.1K
33% of jobs
$143.1K - $152.9K
3% of jobs
$152.9K - $162.7K
2% of jobs
$169.2K is the 75th percentile. Wages above this are outliers.
$162.7K - $172.5K
12% of jobs
$172.5K - $182.4K
5% of jobs
$182.4K - $192.2K
4% of jobs
$192.2K - $202K
12% of jobs
$94K
$150.2K
$202K
| Aspect | Entry Level Asic Rtl Design Engineer | Digital Design Engineer |
|---|---|---|
| Required Credentials | Bachelor's in Electrical Engineering or Computer Engineering; knowledge of HDL (Verilog/VHDL) | Bachelor's in Electrical Engineering, Computer Engineering, or related; HDL knowledge often required |
| Work Environment | Semiconductor companies, chip design teams, hardware development labs | Electronics companies, integrated circuit design teams, hardware development labs |
| Industry Usage | Primarily in ASIC/FPGA chip design | In digital hardware design across various sectors including consumer electronics and telecom |
While both roles involve digital hardware design and HDL skills, the Entry Level Asic Rtl Design Engineer focuses specifically on ASIC chip development, whereas the Digital Design Engineer may work on a broader range of digital systems, including FPGA and other digital hardware projects.
Cities with the most Entry Level Asic Rtl Design Engineer job openings:
The most popular types of Asic Rtl Design Engineer jobs are:
States with the most job openings for Entry Level Asic Rtl Design Engineer jobs include:
For Entry Level Asic Rtl Design Engineer jobs, the most frequently searched job titles are:

Austin, TX • On-site
Other
Re-posted 3 days ago
8.6
Based on 13 frontline employees who took The Breakroom Quiz
At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.
THE ROLE:As a CPU Core RTL Design Engineer, you will help design and optimize next-generation high-performance processor cores within AMD’s central core RTL team, which supports a wide range of products across client, server, and AI platforms. Working closely with architecture, performance, verification, and physical design partners, you will contribute to the development of core pipeline logic and microarchitecture features, with flexibility to align to areas such as load/store or decode based on your expertise. This role has direct impact on performance, power efficiency, and scalability of future CPU designs, offering the opportunity to solve complex technical challenges and influence the direction of cutting-edge processor technology.
THE PERSON:You are a strong problem solver with deep curiosity about CPU architecture and a passion for building efficient, high-performance designs. You collaborate effectively across teams, communicate clearly, and can operate independently to drive complex technical challenges to resolution. You bring both critical thinking and creativity, along with the ability to balance performance, power, and timing considerations in modern processor design.
KEY RESPONSIBILITIES:Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
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Computer and electronic product manufacturing and manufacturing
5,001 - 10,000 Employees
Sunnyvale, CA, US