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Dft Jobs (NOW HIRING)

Retym

DFT Engineer

Austin, TX · On-site

As a DFT Engineer you will work closely with all other design teams - backend, verification and analog, fully responsible for defining, implementing, and deploying advanced design-for-test (DFT ...

Intellectt INC

DFT Engineer

Santa Clarita, CA · On-site

Hello, My name is Bipasa, and I'm reaching out from Intellectt Inc. regarding an exciting contract opportunity for a DFT Engineer based in Santa Clara, California with one of our prestigious clients.

Purple Hires Inc

DFT Engineer

Plano, TX · Remote

Lead ASIC DFT Engineer Location: Remote, (Onsite) Duration: Contract Year of Exp: 8+ yrs to 15 yrs. We are seeking a highly experienced Lead ASIC DFT Engineer to architect, implement, verify, and ...

Lorven Technologies

DFT Engineer

Santa Clara, CA · On-site

DFT Engineer Location: Santa Clara, CA Required Skills & Qualifications • 5+ years of hands-on experience in DFT and ATPG for SoC or ASIC designs • Strong understanding of DFT fundamentals ...

VentureSoft Global

DFT Engineer

San Jose, CA · On-site

Principal DFT Engineer-San Jose,CA We are hiring for a Principal DFT Engineer with strong Siemens Tessent experience for onsite opportunity in San Jose, CA. Key DFT Responsibilities & Skills: * Tool ...

iFlow Inc

DFT Engineer

Santa Clara, CA · On-site

DFT Engineer Location:Santa Clara CA Duration:Long term Experience:8-15 Years Role Purpose We are hiring a DFT Engineer with hands-on experience in Scan, ATPG, MBIST, or Boundary Scan Key ...

Advanced Micro Devices, Inc

DFT Architect

San Jose, CA · On-site

As a DFT Architect you will drive DFT architecture definitions of Scan, MBIST, PHY, high-speed/high-density IOs, communication controllers and FPGA logics of future AMD products. The role involves ...

Intellectt INC

DFT Engineers

Santa Clara, CA · On-site

DFT Engineers Location: Santa Clara, California We are looking for a DFT / ATPG Engineer with strong experience in SoC/ASIC test methodologies, SCAN, MBIST, ATPG, and IJTAG implementation. The ...

Advanced Micro Devices, Inc

DFT Architect

San Jose, CA · On-site

$203K/yr

As a DFT Architect you will drive DFT architecture definitions of Scan, MBIST, PHY, high-speed/high-density IOs, communication controllers and FPGA logics of future AMD products. The role involves ...

Reveille Technologies

DFT Engineer

Mountain View, CA · On-site

DFT Engineer (Scan / MBIST / ATPG) Location: Mountain View CA DFT Engineer (Scan / MBIST / ATPG) We are seeking a DFT Engineer with hands-on experience in Scan, MBIST, ATPG generation, and pattern ...

Eliyan

DFT - Staff DFT Engineer

Mundelein, IL

As an Eliyan Staff DFT Engineer, you will be working at a fast-paced early-stage startup creating technologies that fuel tomorrow's chiplet based systems with best-in-class power, area ...

INA Solution Inc

DFT Engineer

San Jose, CA · On-site

$144K - $191K/yr

DFT Engineer San Jose, CA, San Diego, CA, Irvine, CA, Chandler, AZ Required Skills: * Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or ...

Intellectt INC

DFT Engineers

Santa Clarita, CA · On-site

We have an urgent opening for a DFT Engineers position based in Santa Clara, CA with one of our prestigious clients. If you are interested or know someone who might be a good fit, please share your ...

Purple Hires Inc

ASIC DFT Engineer

Plano, TX · Remote

Lead ASIC DFT Engineer Location: Remote, (Onsite) Duration: Contract Year of Exp: 8+ yrs to 15 yrs. We are seeking a highly experienced Lead ASIC DFT Engineer to architect, implement, verify, and ...

Select Minds LLC

DFT Engineer

Santa Clara, CA · On-site

$65 - $130/hr

Opportunity for advancement DFT Engineer (Design for Test) Location: Santa Clara, CA (Onsite) Employment Type: Long-Term Contract Interview Process: Virtual Interviews Compensation: Based on ...

Intellectt INC

DFT Engineers

Santa Clara, CA · On-site

DFT Engineers Location: Santa Clara, California : * 5+ years of hands-on experience in DFT and ATPG for SoC or ASIC designs * Strong understanding of DFT fundamentals including controllability ...

Retym

DFT Tech Lead

Austin, TX · On-site

As a DFT Tech Lead you will work closely with all other design teams - backend, vlsi, verification and analog, fully responsible for defining, implementing, and deploying advanced design-for-test ...

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How much do dft jobs pay per year?

As of Aug 2, 2026, the average yearly pay for dft in the United States is $78,100.00, according to ZipRecruiter salary data. Most workers in this role earn between $74,000.00 and $82,000.00 per year, depending on experience, location, and employer.

What is the salary of DFT engineer in Nvidia?

The salary of a DFT (Design for Test) engineer at Nvidia typically ranges from $100,000 to $150,000 annually, depending on experience, location, and specific role responsibilities. Nvidia offers competitive compensation packages that may include bonuses and stock options, especially for engineers with specialized skills in verification and testing tools.

Is DFT a good career?

A DFT (Design for Test) engineer specializes in developing testing methods for electronic devices, often requiring knowledge of circuit design and testing tools. It can be a stable career with opportunities in electronics manufacturing and semiconductor industries, especially for those with technical skills and relevant certifications. Job prospects depend on industry demand and individual expertise.

What is the difference between Dft vs Draftsman?

AspectDftDraftsman
Required CredentialsTypically requires a diploma or certification in drafting or engineeringOften requires a diploma or technical training in drafting or architecture
Work EnvironmentWorks in engineering, construction, or manufacturing settingsWorks mainly in architectural or engineering offices
Industry UsageCommonly used in engineering, manufacturing, and construction industriesPrimarily used in architecture and civil engineering sectors
Job FocusDesigning and creating technical drawings for engineering projectsPreparing detailed architectural or structural drawings

In summary, Dft and Draftsman roles share similar skills and work environments, often requiring technical diplomas. Dft typically refers to a broader engineering drafting role, while Draftsman is more focused on architectural drawings. Both are essential in their respective industries for translating concepts into technical plans.

What are ftp jobs?

FTP jobs refer to positions that involve managing or working with File Transfer Protocol (FTP) servers, which are used to transfer files over a network. These roles often require knowledge of network protocols, server management, and security practices, and may involve tasks like uploading, downloading, and maintaining files on remote servers.

What are the key skills and qualifications needed to thrive as a Design for Test (DFT) Engineer, and why are they important?

To thrive as a Design for Test (DFT) Engineer, you need a solid background in digital design, VLSI concepts, and experience with ASIC/FPGA design, typically supported by a degree in electrical or computer engineering. Proficiency with EDA tools such as Synopsys DFT Compiler, Mentor Tessent, and scripting languages like TCL or Python is essential, along with knowledge of test methodologies like scan insertion and ATPG. Strong problem-solving abilities, attention to detail, and effective communication skills help in debugging complex issues and collaborating across teams. These skills are vital for ensuring high-quality, testable hardware designs that meet production and reliability standards.

What are some common challenges faced by DFT (Design for Test) engineers when collaborating with design and verification teams?

DFT engineers often encounter challenges ensuring their test structures integrate seamlessly with the main design and verification flows. Balancing test coverage with minimal impact on design performance requires ongoing communication and compromise. Additionally, DFT engineers must frequently align on methodologies and resolve conflicts between testability requirements and design constraints, making cross-functional teamwork essential for success.

What is DFT role?

A DFT (Design for Test) engineer is responsible for designing integrated circuits and systems to facilitate testing and fault detection. They develop test strategies, create test patterns, and ensure manufacturability and reliability of electronic components, often using specialized tools and industry standards. The role requires knowledge of digital design, testing methodologies, and sometimes automation tools.

What are DFT engineers?

DFT engineers, or Design for Test engineers, are professionals in the semiconductor industry who specialize in designing and implementing testability features in integrated circuits (ICs) and systems-on-chip (SoCs). Their primary role is to ensure that chips can be efficiently and effectively tested for manufacturing defects after fabrication. This involves adding test structures, developing test methodologies, and working closely with design and verification teams to optimize test coverage and reduce the cost of testing. DFT engineers play a critical role in improving product quality and yield in chip manufacturing.
More about DFT jobs
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DFT jobs near you
Infographic showing various Dft job openings in the United States as of July 2026, with employment types broken down into 96% Full Time, 1% Part Time, 2% Contract, and 1% Nights. Highlights an 92% Physical, 6% Hybrid, and 2% Remote job distribution, with an average salary of $78,100 per year, or $37.5 per hour.

DFT Engineer

Retym

Austin, TX • On-site

Full-time

Re-posted 14 days ago

Job description

Description
For an exciting well funded start-up we are looking for a DFT Engineer.
As a DFT Engineer you will work closely with all other design teams - backend, verification and analog, fully responsible for defining, implementing, and deploying advanced design-for-test (DFT) methodologies for highly complex digital and mixed-signal chips. You will work on silicon test strategies, DFT/DFD, BIST for complex next generation SoCs.
Requirements
Minimum qualifications:
  • 5+ Experience in DFT specification definition, architecture, insertion, and analysis in designs
  • Experience in silicon bring-up, debug, and validation of DFT features on ATE, debugging ATPG patterns, Compressed ATPG patterns, MBIST, and JTAG-related issues
  • Experience in fault modeling

Preferred qualifications:
  • Master's degree in Electrical Engineering.
  • Experience in IP integration (memories, Test controllers, TAP, MBIST).
  • Experience using EDA Test tools like Design/Fusion Compiler, DFT Max, SpyGlass, Modus, Tessent, and TestKompress.
  • Experience and understanding of ASIC DFT, synthesis, simulation and verification flow.
  • Excellent attention to detail organizational, problem-solving, and communication skills.

Responsibilities:
  • Implement SoC DFT strategy and architecture (ATPG/DFT/MBIST)
  • Work on hierarchical design
  • Debug all Design Rule checks, apply design fixes to achieve high test quality
  • Insert all DFT logic - boundary scan, scan chains, DFT Compression, Logic BIST, TAP controller, Clock Control block, and other DFT IP blocks.
  • Insert and hook up MBIST logic.
  • Work on test plan for special analog IPs and implement.
  • Document DFT working processes.

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