1

Dft Jobs in California (NOW HIRING)

DFT Engineer Location: Santa Clara, CA Required Skills & Qualifications • 5+ years of hands-on experience in DFT and ATPG for SoC or ASIC designs • Strong understanding of DFT fundamentals ...

Principal DFT Engineer-San Jose,CA We are hiring for a Principal DFT Engineer with strong Siemens Tessent experience for onsite opportunity in San Jose, CA. Key DFT Responsibilities & Skills: * Tool ...

DFT Engineer Location:Santa Clara CA Duration:Long term Experience:8-15 Years Role Purpose We are hiring a DFT Engineer with hands-on experience in Scan, ATPG, MBIST, or Boundary Scan Key ...

As a DFT Architect you will drive DFT architecture definitions of Scan, MBIST, PHY, high-speed/high-density IOs, communication controllers and FPGA logics of future AMD products. The role involves ...

DFT Architect

San Jose, CA · On-site

$203K/yr

As a DFT Architect you will drive DFT architecture definitions of Scan, MBIST, PHY, high-speed/high-density IOs, communication controllers and FPGA logics of future AMD products. The role involves ...

Role: DFT Engineer Location: San Jose CA, San Diego CA, Irvine CA, Chandler AZ (Onsite) Duration: Full time Required Skills: * Bachelor's degree in Electrical Engineering, Computer Engineering ...

DFT Engineer

Santa Clara, CA · On-site

$65 - $130/hr

Opportunity for advancement DFT Engineer (Design for Test) Location: Santa Clara, CA (Onsite) Employment Type: Long-Term Contract Interview Process: Virtual Interviews Compensation: Based on ...

DFT Engineer

San Jose, CA · On-site

$144K - $191K/yr

DFT Engineer San Jose, CA, San Diego, CA, Irvine, CA, Chandler, AZ Required Skills: * Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or ...

DFT Engineer

Santa Clara, CA · On-site

$65 - $130/hr

Opportunity for advancement DFT Engineer (Design for Test) Location: Santa Clara, CA (Onsite) Employment Type: Long-Term Contract Interview Process: Virtual Interviews Compensation: Based on ...

DFT Engineer (Scan / MBIST / ATPG) Location: Mountain View CA DFT Engineer (Scan / MBIST / ATPG) We are seeking a DFT Engineer with hands-on experience in Scan, MBIST, ATPG generation, and pattern ...

Principal DFT Architect

San Jose, CA · On-site

$209K - $299K/yr

About the Role The DFT Architect at Altera is a senior technical authority responsible for defining, driving, and governing next-generation DFT architecture across Altera's most advanced FPGA, SoC ...

DFT Intern

San Jose, CA · On-site

$17.50 - $23.50/hr

Job Summary As a DFT Intern at Etched, you will help review and refine DFT flow automation to support chip-level regression on Caelius. You will work across frontend and backend design teams ...

Key skills for Lead ASIC DFT: please see these key words of in the project description for the profile consideration. "SCAN, ATPG, MBIST, Timing Simulations, SDF, SDC , PSV, Diagnosys , Pattern ...

Principal DFT Architect

San Jose, CA · On-site

$209.50 - $299.20/hr

About the Role The DFT Architect at Altera is a senior technical authority responsible for defining, driving, and governing next‑generation DFT architecture across Altera's most advanced FPGA, SoC ...

DFT Intern

San Jose, CA · On-site

$17.50 - $23.50/hr

Job Summary As a DFT Intern at Etched, you will help review and refine DFT flow automation to support chip-level regression on Caelius. You will work across frontend and backend design teams ...

DFT Engineers

Santa Clara, CA · On-site

$50 - $55/hr

DFT Engineers Location: Santa Clara, California Type: Contract Work Arrangement: Onsite Number of Openings: 9 & Skill Requirement Required Skills & Qualifications * 5+ years of hands-on experience in ...

Principal DFT Architect

San Jose, CA · On-site

$209K - $299K/yr

About the Role The DFT Architect at Altera is a senior technical authority responsible for defining, driving, and governing next-generation DFT architecture across Altera's most advanced FPGA, SoC ...

next page

Showing results 1-20

Dft information

See California salary details

$68.6K

$77.1K

$83.9K

How much do dft jobs pay per year?

As of Aug 13, 2026, the average yearly pay for dft in California is $77,077.00, according to ZipRecruiter salary data. Most workers in this role earn between $73,000.00 and $80,900.00 per year, depending on experience, location, and employer.

What is a DFT job?

A DFT job typically refers to a role involving Design for Testability, where professionals develop testing strategies and procedures to ensure the quality and reliability of electronic circuits and systems. It often requires knowledge of testing tools, circuit design, and industry standards, and may involve working with automated testing equipment. The position usually demands technical skills and attention to detail to identify and address potential manufacturing defects.

Is DFT engineering a good career?

DFT engineering, which involves designing and implementing design-for-testability features in integrated circuits, is a specialized field within electronics and semiconductor industries. It offers opportunities in chip design, testing, and quality assurance, often requiring knowledge of digital design, VLSI, and testing tools. The career can be stable and well-paying for those with relevant skills and certifications, with demand driven by advancements in semiconductor technology.

What is the difference between Dft vs Draftsman?

AspectDftDraftsman
Required CredentialsTypically requires a diploma or certification in drafting or engineeringOften requires a diploma or technical training in drafting or architecture
Work EnvironmentWorks in engineering, construction, or manufacturing settingsWorks mainly in architectural or engineering offices
Industry UsageCommonly used in engineering, manufacturing, and construction industriesPrimarily used in architecture and civil engineering sectors
Job FocusDesigning and creating technical drawings for engineering projectsPreparing detailed architectural or structural drawings

In summary, Dft and Draftsman roles share similar skills and work environments, often requiring technical diplomas. Dft typically refers to a broader engineering drafting role, while Draftsman is more focused on architectural drawings. Both are essential in their respective industries for translating concepts into technical plans.

What are the key skills and qualifications needed to thrive as a Design for Test (DFT) engineer?

To thrive as a Design for Test (DFT) Engineer, you need a solid background in digital design, VLSI concepts, and experience with ASIC/FPGA design, typically supported by a degree in electrical or computer engineering. Proficiency with EDA tools such as Synopsys DFT Compiler, Mentor Tessent, and scripting languages like TCL or Python is essential, along with knowledge of test methodologies like scan insertion and ATPG. Strong problem-solving abilities, attention to detail, and effective communication skills help in debugging complex issues and collaborating across teams. These skills are vital for ensuring high-quality, testable hardware designs that meet production and reliability standards.

What are some common challenges faced by DFT engineers when collaborating with design and verification teams?

DFT engineers often encounter challenges ensuring their test structures integrate seamlessly with the main design and verification flows. Balancing test coverage with minimal impact on design performance requires ongoing communication and compromise. Additionally, DFT engineers must frequently align on methodologies and resolve conflicts between testability requirements and design constraints, making cross-functional teamwork essential for success.

What is a DFT engineer?

DFT engineers, or Design for Test engineers, are professionals in the semiconductor industry who specialize in designing and implementing testability features in integrated circuits (ICs) and systems-on-chip (SoCs). Their primary role is to ensure that chips can be efficiently and effectively tested for manufacturing defects after fabrication. This involves adding test structures, developing test methodologies, and working closely with design and verification teams to optimize test coverage and reduce the cost of testing. DFT engineers play a critical role in improving product quality and yield in chip manufacturing.

Is DFT a good place to work?

DFT, as a job title, typically refers to a role such as a Design for Test engineer or a similar technical position. The work environment and job satisfaction depend on the company, industry, and specific role, but these positions often require technical skills and attention to detail. Overall, the quality of the workplace varies and should be evaluated based on company culture, benefits, and career growth opportunities.
What are the most commonly searched types of Dft jobs in California? The most popular types of Dft jobs in California are:
What job categories do people searching Dft jobs in California look for? The top searched job categories for Dft jobs in California are:
What cities in California are hiring for Dft jobs? Cities in California with the most Dft job openings:
Infographic showing various Dft job openings in California as of July 2026, with employment types broken down into 78% Full Time, and 22% Contract. Highlights an 97% In-person, and 3% Remote job distribution, with an average salary of $77,077 per year, or $37.1 per hour.

Full-time

Re-posted 25 days ago


Job description

Our client is looking DFT Engineer for Fulltime project in Santa Clara, CA (Onsite) Below is the detail requirement.
Job Title: DFT Engineer
Location: Santa Clara, CA
Required Skills & Qualifications
• 5+ years of hands-on experience in DFT and ATPG for SoC or ASIC designs
• Strong understanding of DFT fundamentals including controllability, observability, and scan-based testing
• Proven expertise in ATPG pattern generation, analysis, and debug
• Experience with MBIST, including memory test architectures and diagnostics
• Knowledge of IO Test methodologies for interface and pin level validation
• Solid understanding of clock DFT and clock verification concepts
• Strong grasp of digital design and RTL fundamentals
• Experience with industry standard DFT/ATPG EDA tools
• Ability to work effectively in fast paced, high performance semiconductor programs
• Strong analytical, problem solving, and communication skills
pls source the candidates for the below revised JD. More of the DFx skills and other DFT skills are required.
  • Familiarity with the Siemens suite of DFT tools
  • DFT insertion for SCAN (with SSN) and MBIST
  • MBIST Repair Implementation and Verification
  • Generating collaterals for Test Timing and Place and Route
  • Expertise in IJTAG 1687 standard and good at understanding ICL and PDL standard Spec
  • Verification of DFT features, including
  • Boundary Scan
  • JTAG
  • SCAN
  • MBIST
  • High Speed IO

Lorven technologies logo

About Lorven technologies

Sourced by ZipRecruiter

Lorven Technologies, headquartered in Plainsboro, New Jersey, United States, is a reputable company in the technology industry, specializing in providing effective IT solutions and consulting services. The company's official website, lorventech.com, offers comprehensive insights into its offerings which include but are not limited to software development, IT consulting, project management, and business analysis. Since its inception, Lorven Technologies has been committed to ensuring efficiency and reliability in delivering IT services to its global clientele, establishing itself as a trusted name in the industry.

Industry

It services

Company size

51 - 200 Employees

Headquarters location

Plainsboro, NJ, US

Year founded

2001

Social media