Hello,
My name is Bipasa, and Iโm reaching out from Intellectt Inc. regarding an exciting contract opportunity for a DFT Engineer based in Santa Clara, California with one of our prestigious clients. I would love to connect and discuss this opportunity in more detail. Please feel free to share your updated resume at bipasa.s@intellectt.com
Job Summary
We are seeking an experienced DFT Engineer with 5+ years of hands-on experience in SoC/ASIC Design for Test (DFT). The ideal candidate will have strong expertise in DFT implementation, ATPG, Scan (SSN), MBIST, and Siemens Tessent tools. Experience with MBIST repair, IJTAG (IEEE 1687), JTAG, Boundary Scan, High-Speed IO verification, and DFT verification is highly preferred. The candidate should have a solid understanding of digital design, RTL fundamentals, and be capable of supporting DFT implementation and verification throughout the chip development cycle.
Job Title: DFT Engineer
Location: Santa Clara, California
Key Responsibilities
- Implement and verify DFT solutions for SoC/ASIC designs.
- Perform Scan (SSN), ATPG, and MBIST implementation and verification.
- Support MBIST repair, DFT collaterals, and Test Timing/Place & Route.
- Verify DFT features including JTAG, Boundary Scan, Scan, MBIST, and High-Speed IO.
Requirements
- 5+ years of hands-on DFT experience in SoC/ASIC designs.
- Strong expertise in DFT, ATPG, Scan (SSN), and MBIST.
- Experience with Siemens Tessent or similar DFT/ATPG tools.
- Knowledge of MBIST repair, IJTAG (IEEE 1687), ICL, and PDL.
- Understanding of Clock DFT, RTL, and digital design fundamentals.
- Strong problem-solving and communication skills.