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Dft Jobs in California (NOW HIRING)

H R PUNDITS INC

DFT Engineers

Santa Clara, CA · On-site

$50 - $55/hr

DFT Engineers Location: Santa Clara, California Type: Contract Work Arrangement: Onsite Number of Openings: 9 & Skill Requirement Required Skills & Qualifications * 5+ years of hands-on experience in ...

191 Altera Corporation

Principal DFT Architect

San Jose, CA · On-site

$209.50 - $299.20/hr

About the Role The DFT Architect at Altera is a senior technical authority responsible for defining, driving, and governing next‑generation DFT architecture across Altera's most advanced FPGA, SoC ...

Etched

DFT Intern

San Jose, CA · On-site

$17.50 - $23.50/hr

Job Summary As a DFT Intern at Etched, you will help review and refine DFT flow automation to support chip-level regression on Caelius. You will work across frontend and backend design teams ...

Wipro Limited

DFT Engineer

Mountain View, CA · On-site

$100K - $180K/yr

DFT Engineer City: Mountain View State/Province: California Posting Start Date: 8/24/26 Wipro Limited (NYSE: WIT, BSE: 507685, NSE: WIPRO) is a leading technology services and consulting company ...

Entrada Ventures

DFT Engineer

Palo Alto, CA · On-site

$160 - $230/hr

DFT Engineer - Verification Who we are: We are a stealth-mode startup building foundational technology to address performance, scalability, and resiliency challenges in large-scale AI data center ...

TylSemi, Inc.

DFT Architect

San Jose, CA · On-site

$238 - $286/hr

DFT Architect TylSemi, Inc. San Jose, California, United States About this position About TylSemi, Inc. The Opportunity The Opportunity The AI infrastructure market is exploding. Every hyperscaler ...

Altera Corporation

Principal DFT Architect

San Jose, CA · On-site

$209K - $299K/yr

About the Role The DFT Architect at Altera is a senior technical authority responsible for defining, driving, and governing next-generation DFT architecture across Altera's most advanced FPGA, SoC ...

CA-One Tech Cloud Inc.

DFT Engineer

San Jose, CA · On-site

Senior DFT Enginner San Jose, CA Position Summary We are looking for a highly experienced Senior MBIST Contractor to join our SoC Design-for-Test (DFT) team. The role is focused on hands-on Memory ...

Broadcom, Inc.

DFT Lead Engineer

San Jose, CA · On-site

Principal DFT Engineer Broadcom's ASIC Product Division is seeking candidates for a DFT position at our San Jose, California, Development Center. The successful candidate will be responsible for ...

Tenstorrent

DFT Engineer

Santa Clara, CA · On-site

$100K - $500K/yr

In this role, you will be responsible for DFT implementation using industry standard tools for high-speed CPU core design. This role is remote based out of the United States. We welcome candidates at ...

Broadcom, Inc.

ASIC DFT Engineer

San Jose, CA · On-site

The successful candidate will be responsible for leading DFT programs all the way from chip level DFT specification, through to implementation and verification culminating in successfully releasing ...

Broadcom

DFT Lead Engineer

San Jose, CA · On-site

Principal DFT Engineer Broadcom's ASIC Product Division is seeking candidates for a DFT position at ourSan Jose, California,Development Center. The successful candidate will be responsible for ...

Broadcom Inc.

DFT Lead Engineer

San Jose, CA · On-site

$144 - $230/hr

Broadcom's ASIC Product Division is seeking candidates for a DFT position at our San Jose, California, Development Center. The successful candidate will be responsible for leading DFT programs all ...

Apple Inc.

SoC DFT Engineer

Cupertino, CA · On-site

$150 - $190/hr

Description As a DFT engineer you will be involved with the complete DFT solution for a design project, you will have responsibilities spanning all aspects of semiconductor design.- Developing and ...

Broadcom

ASIC DFT Engineer

San Jose, CA · On-site

The successful candidate will be responsible for leading DFT programs all the way from chip level DFT specification, through to implementation and verification culminating in successfully releasing ...

Intel

DFT Application Engineer

Santa Clara, CA · On-site

Position Overview We seek a DFT Application Engineer to provide technical support to Intel Foundry Services customers on PDKs, DFT/DFM insertion, and ATPG validation methodologies. This critical role ...

Vkore Solutions

Lead ASIC DFT Engineer

San Jose, CA · On-site

Role: Lead ASIC DFT Engineer Location: Remote Experience 10+ years of hands-on experience in ASIC Design-for-Test (DFT) Role Summary We are seeking a highly experienced Lead ASIC DFT Engineer to ...

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Showing results 21-40

All JobsDft JobsDft Jobs in California

Dft information

See California salary details

$68.6K

$77.1K

$83.9K

How much do dft jobs pay per year?

As of Sep 7, 2026, the average yearly pay for dft in California is $77,077.00, according to ZipRecruiter salary data. Most workers in this role earn between $73,000.00 and $80,900.00 per year, depending on experience, location, and employer.

What is a DFT engineer?

DFT engineers, or Design for Test engineers, are professionals in the semiconductor industry who specialize in designing and implementing testability features in integrated circuits (ICs) and systems-on-chip (SoCs). Their primary role is to ensure that chips can be efficiently and effectively tested for manufacturing defects after fabrication. This involves adding test structures, developing test methodologies, and working closely with design and verification teams to optimize test coverage and reduce the cost of testing. DFT engineers play a critical role in improving product quality and yield in chip manufacturing.

What are the key skills and qualifications needed to thrive as a Design for Test (DFT) engineer?

To thrive as a Design for Test (DFT) Engineer, you need a solid background in digital design, VLSI concepts, and experience with ASIC/FPGA design, typically supported by a degree in electrical or computer engineering. Proficiency with EDA tools such as Synopsys DFT Compiler, Mentor Tessent, and scripting languages like TCL or Python is essential, along with knowledge of test methodologies like scan insertion and ATPG. Strong problem-solving abilities, attention to detail, and effective communication skills help in debugging complex issues and collaborating across teams. These skills are vital for ensuring high-quality, testable hardware designs that meet production and reliability standards.

What are some common challenges faced by DFT engineers when collaborating with design and verification teams?

DFT engineers often encounter challenges ensuring their test structures integrate seamlessly with the main design and verification flows. Balancing test coverage with minimal impact on design performance requires ongoing communication and compromise. Additionally, DFT engineers must frequently align on methodologies and resolve conflicts between testability requirements and design constraints, making cross-functional teamwork essential for success.

What is the difference between Dft vs Draftsman?

AspectDftDraftsman
Required CredentialsTypically requires a diploma or certification in drafting or engineeringOften requires a diploma or technical training in drafting or architecture
Work EnvironmentWorks in engineering, construction, or manufacturing settingsWorks mainly in architectural or engineering offices
Industry UsageCommonly used in engineering, manufacturing, and construction industriesPrimarily used in architecture and civil engineering sectors
Job FocusDesigning and creating technical drawings for engineering projectsPreparing detailed architectural or structural drawings

In summary, Dft and Draftsman roles share similar skills and work environments, often requiring technical diplomas. Dft typically refers to a broader engineering drafting role, while Draftsman is more focused on architectural drawings. Both are essential in their respective industries for translating concepts into technical plans.

Is DFT a good career?

A DFT (Design for Test) engineer specializes in developing testing methods for electronic circuits and systems, often requiring knowledge of digital and analog testing techniques, CAD tools, and industry standards. It can be a stable career with opportunities in electronics manufacturing, semiconductor, and technology companies, especially for those with strong technical skills and certifications. The role typically involves problem-solving, attention to detail, and staying current with testing technologies.

Is DFT a good place to work?

DFT, as a job title, typically refers to a role such as a Design for Test engineer or a similar technical position. The work environment and job satisfaction depend on the company, industry, and specific role, but these positions often require technical skills and attention to detail. Overall, the suitability of DFT as a workplace varies based on individual preferences and organizational culture.

What are the most commonly searched types of Dft jobs in California?

The most popular types of Dft jobs in California are:

What are popular job titles related to Dft jobs in California?

For Dft jobs in California, the most frequently searched job titles are:

What job categories do people searching Dft jobs in California look for?

The top searched job categories for Dft jobs in California are:

What cities in California are hiring for Dft jobs?

Cities in California with the most Dft job openings:

Dft jobs near you
Infographic showing various Dft job openings in California as of August 2026, with employment types broken down into 97% Full Time, 2% Contract, and 1% Nights. Highlights an 92% Physical, 5% Hybrid, and 3% Remote job distribution, with an average salary of $77,077 per year, or $37.1 per hour.

DFT Engineers

H R PUNDITS INC

Santa Clara, CA • On-site

$50 - $55/hr

Full-time

Re-posted 7 days ago

Job description


DFT Engineers
Location: Santa Clara, California
Type: Contract
Work Arrangement: Onsite
Number of Openings: 9

Job Description & Skill Requirement


Required Skills & Qualifications

•      5+ years of hands-on experience in DFT and ATPG for SoC or ASIC designs.
•      Strong understanding of DFT fundamentals, including controllability, observability, and scan-based testing.
•      Proven expertise in ATPG pattern generation, analysis, and debug.
•      Experience with MBIST, including memory test architectures and diagnostics.
•      Knowledge of IO test methodologies for interface- and pin-level validation.
•      Solid understanding of clock DFT and clock verification concepts.
•      Strong grasp of digital design and RTL fundamentals.
•      Experience with industry-standard DFT/ATPG EDA tools.
•      Ability to work effectively in fast-paced, high-performance semiconductor programs.
•      Strong analytical, problem-solving, and communication skills.

Qualification

•      Bachelor of Engineering (BE)