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Dft Jobs in Boston, MA (NOW HIRING)

Lightmatter

Sr. Design for Test (DFT) Engineer

Boston, MA · On-site

$154K - $218K/yr

Develop and deploy DFT methodologies for our next generation products * Provide architecture for integrated electronics/analog/digital test including ATPG and boundary scan * Work with RTL designers ...

Cisco

ASIC Core DFT Technical Leader

Maynard, MA · On-site

$214K - $309K/yr

Your Impact As an ASIC DFT Technical Leader, you will drive the definition, architecture, and implementation of cutting-edge Design-for-Test strategies across Cisco's groundbreaking Silicon One ...

Cisco

ASIC Core DFT Technical Lead

Maynard, MA · On-site

$186K - $267K/yr

By driving cutting-edge Design-for-Test (DFT) strategies and pioneering custom IP solutions, you will bridge the gap between front-end RTL, physical design, and post-silicon validation for some of ...

SES

Computational Materials Scientist

Woburn, MA · On-site +1

$180K - $200K/yr

Conduct and oversee DFT (Density Functional Theory), MD (Molecular Dynamics), and QM (Quantum Mechanics) simulations of battery components, including electrolytes, coatings, and electrodes. * Develop ...

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$75.5K

$84.8K

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How much do dft jobs pay per year?

As of Aug 25, 2026, the average yearly pay for dft in Boston, MA is $84,843.00, according to ZipRecruiter salary data. Most workers in this role earn between $80,400.00 and $89,100.00 per year, depending on experience, location, and employer.

What is a DFT engineer?

DFT engineers, or Design for Test engineers, are professionals in the semiconductor industry who specialize in designing and implementing testability features in integrated circuits (ICs) and systems-on-chip (SoCs). Their primary role is to ensure that chips can be efficiently and effectively tested for manufacturing defects after fabrication. This involves adding test structures, developing test methodologies, and working closely with design and verification teams to optimize test coverage and reduce the cost of testing. DFT engineers play a critical role in improving product quality and yield in chip manufacturing.

What are the key skills and qualifications needed to thrive as a Design for Test (DFT) engineer?

To thrive as a Design for Test (DFT) Engineer, you need a solid background in digital design, VLSI concepts, and experience with ASIC/FPGA design, typically supported by a degree in electrical or computer engineering. Proficiency with EDA tools such as Synopsys DFT Compiler, Mentor Tessent, and scripting languages like TCL or Python is essential, along with knowledge of test methodologies like scan insertion and ATPG. Strong problem-solving abilities, attention to detail, and effective communication skills help in debugging complex issues and collaborating across teams. These skills are vital for ensuring high-quality, testable hardware designs that meet production and reliability standards.

What are some common challenges faced by DFT engineers when collaborating with design and verification teams?

DFT engineers often encounter challenges ensuring their test structures integrate seamlessly with the main design and verification flows. Balancing test coverage with minimal impact on design performance requires ongoing communication and compromise. Additionally, DFT engineers must frequently align on methodologies and resolve conflicts between testability requirements and design constraints, making cross-functional teamwork essential for success.

What is the difference between Dft vs Draftsman?

AspectDftDraftsman
Required CredentialsTypically requires a diploma or certification in drafting or engineeringOften requires a diploma or technical training in drafting or architecture
Work EnvironmentWorks in engineering, construction, or manufacturing settingsWorks mainly in architectural or engineering offices
Industry UsageCommonly used in engineering, manufacturing, and construction industriesPrimarily used in architecture and civil engineering sectors
Job FocusDesigning and creating technical drawings for engineering projectsPreparing detailed architectural or structural drawings

In summary, Dft and Draftsman roles share similar skills and work environments, often requiring technical diplomas. Dft typically refers to a broader engineering drafting role, while Draftsman is more focused on architectural drawings. Both are essential in their respective industries for translating concepts into technical plans.

Is DFT a good career?

A DFT (Design for Test) engineer specializes in developing testing methods for electronic circuits and systems, often requiring knowledge of digital and analog testing techniques, CAD tools, and industry standards. It can be a stable career with opportunities in electronics manufacturing, semiconductor, and technology companies, especially for those with strong technical skills and certifications. The role typically involves problem-solving, attention to detail, and staying current with testing technologies.

Is DFT a good place to work?

DFT, as a job title, typically refers to a role such as a Design for Test engineer or a similar technical position. The work environment and job satisfaction depend on the company, industry, and specific role, but these positions often require technical skills and attention to detail. Overall, the suitability of DFT as a workplace varies based on individual preferences and organizational culture.

What are popular job titles related to Dft jobs in Boston, MA?

For Dft jobs in Boston, MA, the most frequently searched job titles are:

What job categories do people searching Dft jobs in Boston, MA look for?

The top searched job categories for Dft jobs in Boston, MA are:

Dft jobs near you
Infographic showing various Dft job openings in Boston, MA as of August 2026, with employment types broken down into 92% Full Time, 3% Part Time, 4% Contract, and 1% Nights. Highlights an 91% Physical, 5% Hybrid, and 4% Remote job distribution, with an average salary of $84,847 per year, or $40.8 per hour.

Senior DFT Consultant (Tessent)

Siemens

Marlborough, MA • On-site

Other

Re-posted 25 days ago

Siemens rating

7.7

Company rating: 7.7 out of 10

Based on 100 frontline employees who took The Breakroom Quiz

267th of 450 rated engineering

Job description

Senior DFT Consultant (Tessent)

The Design for Test Consultant will be responsible for supporting the use of Tessent DFT software in the design of complex Application Specific Integrated Circuit (ASIC) designs. As a Design for Test Consultant, you will be part of a team contributing to implementing and verifying DFT features within our Enterprise Customer's (ASIC) products, as well as enabling them to utilize our advanced methodologies around our Tessent tool suite.

Areas of responsibility include delivering consulting services covering a broad range of DFT activities, working with customers to implement and deploy DFT flows centered around Tessent tool, enabling customer adoption of the full capability of Tessent software and methodologies, effectively communicating how Siemens Digital Industries Software products and service offerings address customers' technical objectives, articulating customer's technical requirements and influencing product engineering to shape product direction, building and maintaining ongoing positive relationships with customers, working collaboratively with team members to ensure mutual success, delivering Tessent-based solutions to address our customer's technical and business needs, and occasional travel world-wide to customer sites, primarily within Europe.

Your qualifications & experience include a BSEE or BSCS, or equivalent; MSEE preferred, ASIC Design for Test experience, interest in applying engineering skills in a creative way to solve unique customer challenges, existing Design for Test experience including MBIST, IJTAG, Boundary Scan, Scan, ATPG, Embedded Compression, strong understanding of the overall ASIC design, experience in design flow automation in the Tessent Shell environment, experienced in Memory BIST with repair using Tessent MBIST, experienced with Logic BIST using Tessent Hybrid TK/LBIST, experience with IJTAG (IEEE 1687), ICL/PDL, experience performing boundary scan insertion using Tessent Boundary Scan, experience in ATPG and compression using TestKompress, experience in scan insertion using Tessent Scan, experience in the verification leveraging Tessent generated testbenches using Questa and industry standard simulation tools, experience with tcl scripting, DFT architecture and methodology development is highly desired, RTL design experience is a plus, strong communication skills are essential, and self-motivated and self-disciplined.

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