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Freelance Asic Rtl Design Engineer Jobs in Boston, MA

If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. Are you looking to expand your chip design ...

If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. Are you looking to expand your chip design ...

If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. Are you looking to expand your chip design ...

If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. Are you looking to expand your chip design ...

NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world's leading ... Implement in RTL and debug while collaborating with the verification team to ensure that the design ...

NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world's leading ... Implement in RTL and debug while collaborating with the verification team to ensure that the design ...

ASIC Design Engineer

Boston, MA · On-site

$130 - $210/hr

We're looking for ASIC design engineers to contribute to and own blocks in the development of the A-0 and A-1 wafer products, across both the XPU, memory chiplet and other dies on the wafer. Ideal ...

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Freelance Asic Rtl Design Engineer information

See Boston, MA salary details

$16

$51

$143

How much do freelance asic rtl design engineer jobs pay per hour?

As of Aug 30, 2026, the average hourly pay for freelance asic rtl design engineer in Boston, MA is $51.83, according to ZipRecruiter salary data. Most workers in this role earn between $26.39 and $67.12 per hour, depending on experience, location, and employer.

Are freelance ASIC RTL design engineers in demand?

Freelance ASIC RTL design engineers are in demand due to the growing need for custom chip development in industries like telecommunications, AI, and consumer electronics. Skills in hardware description languages such as Verilog or VHDL, along with experience in FPGA prototyping, enhance employability in this flexible work arrangement.

How much does a Freelance ASIC RTL Design Engineer make?

Freelance ASIC RTL Design Engineers typically earn between $50 and $150 per hour, depending on experience, project complexity, and location. Rates can vary based on expertise in hardware description languages like Verilog or VHDL and familiarity with FPGA or ASIC design tools.

What are the most commonly searched types of Asic Rtl Design Engineer jobs in Boston, MA?

The most popular types of Asic Rtl Design Engineer jobs in Boston, MA are:

What are popular job titles related to Freelance Asic Rtl Design Engineer jobs in Boston, MA?

For Freelance Asic Rtl Design Engineer jobs in Boston, MA, the most frequently searched job titles are:

What job categories do people searching Freelance Asic Rtl Design Engineer jobs in Boston, MA look for?

The top searched job categories for Freelance Asic Rtl Design Engineer jobs in Boston, MA are:

What cities near Boston, MA are hiring for Freelance Asic Rtl Design Engineer jobs?

Cities near Boston, MA with the most Freelance Asic Rtl Design Engineer job openings:

    Infographic showing various Freelance Asic Rtl Design Engineer job openings in Boston, MA as of August 2026, with employment types broken down into 57% Full Time, and 43% Contract. Highlights an 100% In-person job distribution, with an average salary of $107,804 per year, or $51.8 per hour.

    Senior ASIC RTL DESIGN Engineer

    Carlton National Resources, INC

    Boston, MA • On-site

    Other

    Posted 17 days ago


    Job description

    12 Months + CONTRACT Starting in September
    SKILLS:
    SENIOR ASIC RTL Design
    Verilog
    High Speed Memory Interface Experience 
    Logic synthesis & Timing constraints
    Forward Error Correction (FEC), Bit Rate Error (BER) calculations
    Integrating Soft IP from Industry Standard and Custom IP into the design Bandwidth calculation
    Prefer experience with some of:

    • LPDDR5
    • UFS/Flash
    • PCIe Gen4/5