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Remote Asic Design Jobs in Boston, MA (NOW HIRING)

Remote Asic Design information

See Boston, MA salary details

$102.1K

$163.2K

$219.5K

How much do remote asic design jobs pay per year?

As of Aug 30, 2026, the average yearly pay for remote asic design in Boston, MA is $163,173.00, according to ZipRecruiter salary data. Most workers in this role earn between $142,900.00 and $195,600.00 per year, depending on experience, location, and employer.

What is a remote ASIC design engineer?

A Remote ASIC Design engineer is a professional who specializes in designing application-specific integrated circuits (ASICs) while working from a location outside of a traditional office environment. These engineers use specialized software tools to develop, simulate, and verify custom hardware chips that meet specific client or project requirements. Remote work in this field requires strong communication skills, the ability to collaborate with global teams, and expertise in digital or analog circuit design. The role often involves tasks such as RTL coding, timing analysis, and working closely with verification and fabrication teams.

How does working remotely as an ASIC design engineer affect collaboration and project workflow?

As a remote ASIC Design Engineer, collaboration typically relies heavily on digital communication tools such as Slack, Zoom, and project management platforms. While core design work is often done independently, frequent coordination with verification engineers, layout teams, and project managers is crucial to ensure alignment on specifications and progress. Teams usually hold regular virtual meetings and design reviews to discuss challenges, troubleshoot issues, and synchronize on project milestones. Adapting to clear documentation and proactive communication helps maintain smooth workflow and minimizes the impact of physical distance.

What are the key skills and qualifications needed to thrive as a remote ASIC design engineer?

To thrive as a Remote ASIC Design Engineer, you need a strong background in digital design principles, hardware description languages (HDLs) like Verilog or VHDL, and a relevant engineering degree. Proficiency with EDA tools such as Synopsys, Cadence, and simulation software, along with experience in version control systems, is typically required. Excellent problem-solving skills, attention to detail, and effective remote communication are crucial soft skills for collaborating with distributed teams. These abilities ensure accurate, efficient ASIC development and seamless integration within global engineering projects.

What is the difference between Remote Asic Design vs Remote FPGA Design?

AspectRemote Asic DesignRemote FPGA Design
Required CredentialsBachelor's/Master's in Electrical Engineering or Computer Engineering, experience with ASIC toolsBachelor's/Master's in Electrical Engineering or related field, FPGA development experience
Work EnvironmentDesigning custom integrated circuits for manufacturingDeveloping programmable logic devices for prototyping and specific applications
Industry UsageSemiconductors, consumer electronics, automotivePrototyping, testing, and specialized hardware solutions
Common Search/ComparisonYesYes

Remote Asic Design and Remote FPGA Design share similar credentials and work environments, both involving digital hardware development. However, ASIC design focuses on creating custom chips for mass production, while FPGA design emphasizes programmable hardware for flexible applications. Understanding these differences helps professionals choose the right career path or project focus within the hardware design industry.

What are the most commonly searched types of Asic Design jobs in Boston, MA?

The most popular types of Asic Design jobs in Boston, MA are:

What job categories do people searching Remote Asic Design jobs in Boston, MA look for?

The top searched job categories for Remote Asic Design jobs in Boston, MA are:

Infographic showing various Remote Asic Design job openings in Boston, MA as of August 2026, with employment types broken down into 86% Full Time, 11% Part Time, and 3% Contract. Highlights an 81% Physical, 5% Hybrid, and 14% Remote job distribution, with an average salary of $163,173 per year, or $78.4 per hour.

ASIC and Logic Design Engineering Manager (Compute Test, North Reading)

Teradyne

North Reading, MA • On-site, Remote

$155K/yr

Full-time

Medical, Dental, Vision, Life, Retirement, PTO

Posted 3 days ago

New


Job description

We are the global test and automation specialists, powering next-generation technologies through sophisticated solutions. Behind every electronic device you use, Teradyne's test technology ensures your device works right the first time, every time! Our portfolio of automation solutions help manufacturers to develop and deliver products quickly, efficiently and cost-effectively. Together, Teradyne companies deliver manufacturing automation across industries and applications around the world!

We attract, develop, and retain a high-performance workforce, comprised of people with diverse backgrounds and a shared drive for excellence. We strive to foster a positive and inclusive work environment that helps employees, and communities, thrive.

Our Purpose
TERADYNE, where experience meets innovation and driving excellence in every connection. We are fueled by creativity and diversity of thought and in our workforce. Our employees are supported to innovate and learn something new every day.
We cultivate a culture of inclusion for all employees that respects their individual strengths, views, and experiences. We believe that our differences enable us to be a better team - one that makes better decisions, drives innovation and delivers better business results.
Opportunity Overview
The Logic Design Manager is responsible for leading a team of developers in designing and verifying FPGA's for Teradyne Compute Test Division's next generation products. In this role you will lead a team of ~4-6 engineers in a fast-paced environment to help the organization meet key business needs. Requires close collaboration with the other FPGA design and verification managers and with other engineering disciplines including mixed signal ASIC design, circuit board design, software and systems engineering to specify and implement new products. You should have hands-on experience with complex FPGA (and preferably digital ASIC) SOC designs for real-world products. You also should have a proven track record of managing engineering teams toward timely deliverables and successful project completion.  

  • Lead multiple simultaneous (typically 2-3) FPGA or digital IP development projects. 

  • Typically includes oversight of some remote resources.  

  • Planning and tracking of project schedule and budget. 

  • Manage project staffing levels including both full time and contract resources. 

  • Represent the FPGA team on project core teams and at program reviews. 

  • Contribute to FPGA implementation (i.e. code RTL blocks) as needed. 

  • Provide technical support for HW sustaining issues. 

  • Set goals, provide coaching and manage compensation of a 4-6 person team. 

  • Contribute to FPGA team process improvement initiatives. 

  • Collaborate with other engineering and business disciplines to ensure that FPGA and IP deliverables satisfy all product requirements. 


All About You
We seek individuals who share our passion and determination. Our commitment to customer success drives us to go the extra mile. If you're ready to join us in this mission, take a closer look at the minimum criteria for the position.

  • BSEE or MSEE and 12+ years of relevant experience in Digital FPGA design and integration (Digital ASIC experience is a plus). 
  • Minimum of 5 years of experience as an FPGA/ASIC project lead, driving multiple projects from concept, architecture exploration, design implementation and lab validation to production release. 
  • Extensive experience coding RTL (verilog preferred). 
  • Extensive experience using digital simulation tools (Cadence preferred). 
  • Extensive experience using static timing analysis tools. 
  • Experience designing with the following: PCIe, DDR3/4/5, AXI, ethernet, SPI, SERDES 
  • Experience with either AMD or Altera FPGAs and development tools (Vivado/Quartus), preferably both. 
  • Experience using digital design quality tools e.g. LINT, CDC. 
  • Experience with bug tracking tools (Jira etc.) 
  • Experience with source control systems (Clearcase, Git, CVS) and continuous integration. 
  • Familiarity with digital verification tools and methodologies (preferably UVM). 
  • Experience with project scheduling tools (e.g. Microsoft project) 
  • Experience with embedded processors and digital signal processing is a plus. 
  • Experience with high level programming languages (C, C++) is a plus. 
  • Excellent presentation and communication skills. 
  • Preferred: Experience developing hardware for automated test equipment is a plus. 
  • Preferred: 2-3 years of experience as a first level manager of an engineering team. 

Compensation:
The base salary range for this role is $155,500 - $ 248,700. This range is a good faith estimate, and the amount of base salary will correspond with experience and skill set. This range can also fluctuate depending on demand and location.

 

Incentive Plan: This job is eligible for discretionary bonus(es) based on financial performance.  

Benefits:

Teradyne offers a variety of robust health and well-being benefit programs, including medical, dental, vision, Flexible Spending Accounts, retirement savings plans, life and disability insurance, paid vacation & holidays, tuition assistance programs, and more.  Please click here to see details.  

 

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