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Contractual Asic Rtl Design Engineer Jobs in Boston, MA

If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. Are you looking to expand your chip design ...

If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. Are you looking to expand your chip design ...

If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. Are you looking to expand your chip design ...

If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. Are you looking to expand your chip design ...

NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world's leading ... Implement in RTL and debug while collaborating with the verification team to ensure that the design ...

NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world's leading ... Implement in RTL and debug while collaborating with the verification team to ensure that the design ...

ASIC Design Engineer

Boston, MA · On-site

$130 - $210/hr

We're looking for ASIC design engineers to contribute to and own blocks in the development of the A-0 and A-1 wafer products, across both the XPU, memory chiplet and other dies on the wafer. Ideal ...

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Contractual Asic Rtl Design Engineer information

See Boston, MA salary details

$102.1K

$163.2K

$219.5K

How much do contractual asic rtl design engineer jobs pay per year?

As of Aug 31, 2026, the average yearly pay for contractual asic rtl design engineer in Boston, MA is $163,173.00, according to ZipRecruiter salary data. Most workers in this role earn between $142,900.00 and $195,600.00 per year, depending on experience, location, and employer.

What is the difference between Contractual Asic Rtl Design Engineer vs Digital IC Design Engineer?

AspectContractual Asic Rtl Design EngineerDigital IC Design Engineer
CredentialsBachelor's/Master's in Electrical Engineering or Computer EngineeringBachelor's/Master's in Electrical Engineering or Computer Engineering
Work EnvironmentContract-based, project-specific, often in semiconductor or tech companiesFull-time or contract, working on digital integrated circuit design
Industry UsageCommon in semiconductor, electronics, and tech firms for ASIC developmentUsed across semiconductor, consumer electronics, and communication industries

Both roles require similar educational backgrounds and work in related environments, focusing on digital circuit design. The main difference is that Contractual Asic Rtl Design Engineers typically work on specific ASIC projects on a contractual basis, while Digital IC Design Engineers may have broader responsibilities in digital chip development, often in full-time roles.

What are the most commonly searched types of Asic Rtl Design Engineer jobs in Boston, MA?

The most popular types of Asic Rtl Design Engineer jobs in Boston, MA are:

What are popular job titles related to Contractual Asic Rtl Design Engineer jobs in Boston, MA?

For Contractual Asic Rtl Design Engineer jobs in Boston, MA, the most frequently searched job titles are:

What job categories do people searching Contractual Asic Rtl Design Engineer jobs in Boston, MA look for?

The top searched job categories for Contractual Asic Rtl Design Engineer jobs in Boston, MA are:

What cities near Boston, MA are hiring for Contractual Asic Rtl Design Engineer jobs?

Cities near Boston, MA with the most Contractual Asic Rtl Design Engineer job openings:

    Senior ASIC RTL DESIGN Engineer

    Boston, MA • On-site

    Carlton National Resources, INC
    Recruiting and Staffing Services • 51 - 200 employees

    Other

    Posted 17 days ago


    Job description

    12 Months + CONTRACT Starting in September
    SKILLS:
    SENIOR ASIC RTL Design
    Verilog
    High Speed Memory Interface Experience 
    Logic synthesis & Timing constraints
    Forward Error Correction (FEC), Bit Rate Error (BER) calculations
    Integrating Soft IP from Industry Standard and Custom IP into the design Bandwidth calculation
    Prefer experience with some of:

    • LPDDR5
    • UFS/Flash
    • PCIe Gen4/5