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Contract Physical Design Engineer Jobs in California

Search Tactics LLC

Physical Design Engineer

San Jose, CA · On-site

$159K - $164K/yr

Physical Design Engineer Location: San Jose, CA Hybrid Duration: 12 Months VISA: H-1, USC Position ... This contract position will focus on synthesis, floorplanning, physical implementation, and ...

search-tactics

Physical Design Engineer

San Jose, CA · On-site

$70 - $80/hr

Physical Design Engineer Location: San Jose, CA Hybrid Duration: 12 Months VISA: H-1, GC, USC is ... This contract position will focus on synthesis, floorplanning, physical implementation, and ...

New

Sivaltech

Physical Design Engineer

San Diego, CA · On-site

$144K - $148K/yr

Physical Design Engineer Required California, USA We're seeking an experienced Physical Design Engineer with 10+ years of experience in ASIC design, place and route, and physical verification. The ...

Apple

Physical Design Engineer

San Francisco, CA · On-site

$160K - $164K/yr

We have an opportunity for a forward-thinking and unusually hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the rare and great opportunity to craft upcoming ...

Apple

Physical Design Engineer

Cupertino, CA · On-site

$167K - $172K/yr

We have an opportunity for a forward-thinking and unusually hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the rare and great opportunity to craft upcoming ...

Apple

Physical Design Engineer

Cupertino, CA · On-site

$167K - $172K/yr

We have an opportunity for a forward-thinking and unusually hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the rare and great opportunity to craft upcoming ...

Stellent IT LLC

Physical Design Engineer

San Jose, CA · On-site

$159K - $164K/yr

Title :: Physical Design Engineer Location :: San Jose, CA Job Type:- Full Time We are seeking a Physical Design Engineer with extensive industry experience to join our world-class silicon ...

Apple

Physical Design Engineer

Cupertino, CA · On-site

$167K - $172K/yr

We have an opportunity for a forward-thinking and unusually hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the rare and great opportunity to craft upcoming ...

Apple

Physical Design Engineer

Cupertino, CA · On-site

$167K - $172K/yr

We have an opportunity for a forward-thinking and unusually hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the rare and great opportunity to craft upcoming ...

Stellent IT LLC

Physical Design Engineer.

San Diego, CA · On-site

$144K - $148K/yr

Hello, Tittle-Physical Design Engineer Location- San Diego, California, San Jose, CA and Irvine, CA Job Type- Fulltime Physical Design Engineer We are looking for humble geniuses, who believe that ...

Apple

Physical Design Engineer

Cupertino, CA · On-site

$167K - $172K/yr

We have an opportunity for a forward-thinking and unusually hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the rare and great opportunity to craft upcoming ...

Apple

Physical Design Engineer

San Francisco, CA · On-site

$160K - $164K/yr

We have an opportunity for a forward-thinking and unusually hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the rare and great opportunity to craft upcoming ...

Apple

Physical Design Engineer

San Francisco, CA · On-site

$160K - $164K/yr

We have an opportunity for a forward-thinking and unusually hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the rare and great opportunity to craft upcoming ...

Apple

Physical Design Engineer

San Francisco, CA · On-site

$160K - $164K/yr

We have an opportunity for a forward-thinking and unusually hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the rare and great opportunity to craft upcoming ...

iFlow Inc

Physical Design Engineer

Sunnyvale, CA · On-site

$159K - $164K/yr

Physical Design Engineer Location:Sunnyvale, CA OR Austin,TX Duration: Long term experience: 5-18 years only ( No 18+ years profile) Job Overview: We are looking for a highly skilled Physical Design ...

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Contract Physical Design Engineer information

What are the key skills and qualifications needed to thrive as a Contract Physical Design Engineer, and why are they important?

A Contract Physical Design Engineer typically requires a solid background in electrical engineering, strong knowledge of VLSI design, and hands-on experience with ASIC or FPGA physical implementation. Familiarity with EDA tools such as Synopsys ICC2, Cadence Innovus, and scripting languages like Tcl and Perl, as well as understanding of industry standards, is crucial. Standout soft skills include strong problem-solving abilities, attention to detail, and effective communication for collaborating with cross-functional teams. These skills ensure the engineer can deliver optimized, manufacturable chip layouts on time and within specification, which is vital for project and product success.

What are Contract Physical Design Engineers?

Contract Physical Design Engineers are professionals who specialize in the layout and implementation of integrated circuits (ICs) for semiconductor devices, typically working on a temporary or project-based basis. They focus on transforming circuit designs into physical layouts that can be fabricated on silicon chips, ensuring optimal performance, power, and area efficiency. Their work involves tasks such as floorplanning, placement, routing, timing analysis, and design rule checking. Contract roles allow companies flexibility in staffing for specific projects or peak development periods, and engineers in these positions often work for consulting firms or as independent contractors.

What are some common challenges faced by Contract Physical Design Engineers when joining new projects or teams?

Contract Physical Design Engineers often need to quickly adapt to new workflows, proprietary tools, and unique design methodologies used by different clients or teams. They may also face tight project timelines and the need to rapidly understand complex chip architectures. Effective communication and collaboration with cross-functional teams, such as verification and RTL design engineers, are critical to ensure design hand-offs and resolve issues efficiently. Flexibility, strong organizational skills, and a proactive approach to learning new environments are key to overcoming these challenges.
What are the most commonly searched types of Physical Design Engineer jobs in California? The most popular types of Physical Design Engineer jobs in California are:
What are popular job titles related to Contract Physical Design Engineer jobs in California? For Contract Physical Design Engineer jobs in California, the most frequently searched job titles are:
What job categories do people searching Contract Physical Design Engineer jobs in California look for? The top searched job categories for Contract Physical Design Engineer jobs in California are:
What cities in California are hiring for Contract Physical Design Engineer jobs? Cities in California with the most Contract Physical Design Engineer job openings:
Contract Physical Design Engineer jobs near you
Infographic showing various Contract Physical Design Engineer job openings in California as of July 2026, with employment types broken down into 1% As Needed, 65% Full Time, 19% Part Time, 1% Temporary, and 14% Contract. Highlights an 81% Physical, 2% Hybrid, and 17% Remote job distribution.

Physical Design Engineer

Search Tactics LLC

San Jose, CA • On-site

$159K - $164K/yr

Other

Posted 4 days ago

Job description

Position: Physical Design Engineer
Location: San Jose, CA Hybrid

Duration: 12 Months

VISA: H-1, USC

Position Overview

We are seeking an experienced Physical Design Engineer to support the implementation of high-performance semiconductor designs targeting advanced process technologies. This contract position will focus on synthesis, floorplanning, physical implementation, and performance optimization for complex, timing-sensitive designs while working closely with cross-functional engineering teams.

Key Responsibilities

Execute RTL synthesis for complex ASIC and SoC designs using Cadence Genus.

Optimize designs for power, performance, and area (PPA) throughout the synthesis and physical design flow.

Develop and improve floorplans using Cadence Innovus, ensuring efficient utilization and routing.

Collaborate with RTL, architecture, and design teams to provide feedback on timing, constraints, and implementation strategies.

Partner with physical implementation and place-and-route teams to achieve timing closure and design quality goals.

Analyze timing challenges, identify critical paths, and recommend design improvements to improve convergence.

Support physical implementation activities from synthesis through implementation while maintaining design quality and schedule objectives.

Required Qualifications

Bachelor's degree in Electrical Engineering, Computer Engineering, or a related discipline.

5+ years of experience in ASIC or SoC Physical Design.

Hands-on expertise with Cadence Genus for synthesis and Cadence Innovus for floorplanning and implementation.

Experience working on large, high-performance semiconductor designs with demanding timing requirements.

Strong knowledge of synthesis, timing analysis, physical implementation, and PPA optimization.

Experience with advanced semiconductor process technologies such as 5nm, 3nm, or newer.

Excellent communication skills and the ability to work effectively with RTL, architecture, physical design, and implementation teams.

Preferred Qualifications

Experience supporting complex SoC, AI, HPC, or accelerator designs.

Strong understanding of timing closure methodologies and synthesis-to-implementation correlation.

Familiarity with advanced implementation flows, design constraints, and physical optimization techniques.

Proven ability to collaborate with globally distributed engineering teams to deliver successful silicon implementations.

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