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Entry Level Physical Design Engineer Jobs in California

Altera Corporation

Physical Design Engineer

San Jose, CA · On-site

$105K - $120K/yr

As a Physical Design Engineer, you will support block-level and/or top-level physical design implementation activities across FPGA product development. You will work closely with cross-functional ...

Altera

Physical Design Engineer

San Jose, CA · On-site

$105K - $120K/yr

As a Physical Design Engineer, you will support block-level and/or top-level physical design implementation activities across FPGA product development. You will work closely with cross-functional ...

New

Apple

Physical Design Engineer

Cupertino, CA

$129K - $225K/yr

Description As a Physical Design engineer you will contribute to all phases of physical design of high performance PHY design from RTL to delivery of our final GDSII.","responsibilities":"Generate ...

Apple

Physical Design Engineer

Cupertino, CA

$129K - $225K/yr

Description As a Physical Design engineer you will contribute to all phases of physical design of high performance PHY design from RTL to delivery of our final GDSII. Your responsibilities include ...

Apple

Physical Design Engineer

Cupertino, CA

$129K - $225K/yr

Description As a Physical Design engineer you will contribute to all phases of physical design of high performance PHY design from RTL to delivery of our final GDSII.","responsibilities":"Generate ...

Apple

Physical Design Engineer

Cupertino, CA

$129K - $225K/yr

Description As a Physical Design engineer you will contribute to all phases of physical design of high performance PHY design from RTL to delivery of our final GDSII. Your responsibilities include ...

Etched

Physical Design Engineer

Cupertino, CA · On-site

$2.0K/mo

Physical Design Engineer Etched is looking for exceptional PD engineers to join our team. The candidate will be responsible for working with 3rd party design services to implement and verify physical ...

Etched

Physical Design Engineer

Cupertino, CA · On-site

$2.0K/mo

Physical Design Engineer Etched is looking for exceptional PD engineers to join our team. The candidate will be responsible for working with 3rd party design services to implement and verify physical ...

Mirafra Technology

Physical Design Engineer

San Diego, CA · On-site

$144K - $148K/yr

Job Overview: The Graphics team is looking for Experienced Physical Design Engineers to work on Adreno Graphics cores in the area of Physical Implementation. Responsibilities: The Physical ...

Mirafra Technology

Physical Design Engineer

San Diego, CA

$144K - $148K/yr

Physical Design Engineer Location : San Diego,CA Type : Full Time Job Overview: To do Floor planning, P&R, timing closure SI prevention/fixing, power planning, CTS, PV and I/R drop for Block as well ...

Scadea Solutions Inc

Physical Design Engineer

San Diego, CA · On-site

$144K - $148K/yr

PHYSICAL DESIGN Engineer Work Location -San Diego , CA Duration: 6+ Months Experience: 8-10Yrs Start Date- Immediate • Floor planning, P&R, timing closure SI prevention/fixing, power planning, CTS ...

TSMC

Physical Design Engineer (7452)

San Jose, CA · On-site

$155K - $160K/yr

Overview of Role Are you a highly motivated and skilled Physical Design Engineer with at least 3 years of industrial experience eager to push the boundaries of semiconductor technology? Join our ...

TSMC

Physical Design Engineer (7452)

San Jose, CA · On-site

$155K - $160K/yr

Overview of Role Are you a highly motivated and skilled Physical Design Engineer with at least 3 years of industrial experience eager to push the boundaries of semiconductor technology? Join our ...

Google

Silicon Physical Design Engineer

Sunnyvale, CA · On-site

$159K - $164K/yr

As a Physical Design Engineer, you will collaborate with RTL, Design for Testing (DFT), Floorplan, and full-chip Signoff teams. Additionally, you will solve technical problems with innovative micro ...

New

Embtel Inc

Physical Design Engineer (Remote)

Sunnyvale, CA · On-site

$159K - $164K/yr

Physical Design Engineer Locations : Sunnyvale, CA/Portland, OR (Remote) No. of positions: 11 Duration: 6+ Months Contract Role Solid experience in place & route flow (placement guidelines, clock ...

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All JobsPhysical Design Engineer JobsEntry Level Physical Design Engineer JobsEntry Level Physical Design Engineer Jobs in California

Entry Level Physical Design Engineer information

What does an Entry Level Physical Design Engineer do?

An Entry Level Physical Design Engineer works on the layout and implementation of integrated circuits (ICs), specifically focusing on translating logical circuit designs into physical layouts that can be manufactured. Their responsibilities often include tasks such as floorplanning, placement, routing, timing analysis, and design rule checking using specialized software tools. They collaborate with other engineers to ensure that the chip meets performance, power, and area requirements. Entry-level engineers are typically involved in supporting more experienced team members while learning industry-standard design flows and tools. This role plays a crucial part in bringing new electronic products to market.

What are some common challenges Entry Level Physical Design Engineers face when transitioning from academic projects to industry roles?

Entry Level Physical Design Engineers often find that real-world projects are larger in scale and complexity compared to academic assignments. Adapting to industry-standard tools like Cadence or Synopsys, managing strict deadlines, and collaborating within multidisciplinary teams can be challenging at first. Additionally, understanding and following established workflows, as well as dealing with the nuances of process technology and design constraints, require a steep learning curve. However, many companies provide mentorship and training to help new engineers integrate smoothly and develop their expertise.

What are the key skills and qualifications needed to thrive as an Entry Level Physical Design Engineer, and why are they important?

To thrive as an Entry Level Physical Design Engineer, you need a solid background in electrical engineering, digital logic design, and VLSI concepts, typically supported by a relevant bachelor’s or master’s degree. Familiarity with industry-standard tools like Cadence, Synopsys, or Mentor Graphics for layout, synthesis, and verification, as well as scripting languages such as TCL or Python, is essential. Strong problem-solving, teamwork, and attention to detail are standout soft skills for this role. These skills ensure the efficient translation of circuit designs into manufacturable layouts, driving successful chip development and collaboration in complex engineering environments.

What is the difference between Entry Level Physical Design Engineer vs Digital IC Design Engineer?

AspectEntry Level Physical Design EngineerDigital IC Design Engineer
CredentialsBachelor's in Electrical Engineering or Computer EngineeringBachelor's or Master's in Electrical Engineering or Computer Engineering
Work EnvironmentDesign teams, CAD tools, chip fabrication facilitiesDesign teams, simulation tools, hardware labs
Industry UsageFoundries, semiconductor companies, EDA firmsSemiconductor companies, integrated circuit design firms
Common Search IntentEntry level, physical implementation, chip layoutDigital logic, circuit design, RTL coding

Entry Level Physical Design Engineers focus on translating digital circuit designs into physical layouts, ensuring manufacturability and performance. Digital IC Design Engineers primarily work on designing digital circuits at the RTL level. While both roles require a background in electrical engineering and involve working with semiconductor companies, physical design emphasizes layout and fabrication, whereas digital design emphasizes circuit functionality and logic.

What are the most commonly searched types of Physical Design Engineer jobs in California? The most popular types of Physical Design Engineer jobs in California are:
What are popular job titles related to Entry Level Physical Design Engineer jobs in California? For Entry Level Physical Design Engineer jobs in California, the most frequently searched job titles are:
What job categories do people searching Entry Level Physical Design Engineer jobs in California look for? The top searched job categories for Entry Level Physical Design Engineer jobs in California are:
What cities in California are hiring for Entry Level Physical Design Engineer jobs? Cities in California with the most Entry Level Physical Design Engineer job openings:
Entry Level Physical Design Engineer jobs near you
Infographic showing various Entry Level Physical Design Engineer job openings in California as of July 2026, with employment types broken down into 87% Full Time, 9% Part Time, 1% Temporary, and 3% Contract. Highlights an 87% Physical, 3% Hybrid, and 10% Remote job distribution.
Physical Design Engineer

Physical Design Engineer

Altera Corporation

San Jose, CA • On-site

$105K - $120K/yr

Full-time

This job post has expired today. Applications are no longer accepted.

Job description

Job Details:
Job Description:
About Altera
At Altera™, our independence as the world's largest pure-play FPGA solutions provider gives us the focus, speed, and agility to innovate without compromise. With more than four decades of industry-leading FPGA expertise, our singular mission is to deliver the programmable technologies that help customers differentiate, innovate, and scale across rapidly evolving markets like AI, cloud, networking, and edge. As an independent company, we move faster, invest deeper, and partner more closely-empowering our teams to drive breakthrough innovation and shape the future of the FPGA industry.
About the Role
Altera is looking for a Physical Design Engineer to join our Silicon Engineering organization.
In this role, you will contribute to the physical implementation of next-generation FPGA products, partnering closely with architecture, RTL design, DFT, timing, power, and verification teams to help deliver high-quality silicon. This is an excellent opportunity for an early-career engineer or recent graduate with a Master's degree who is looking to grow technical depth in physical design and backend implementation in a fast-paced semiconductor environment.
As a Physical Design Engineer, you will support block-level and/or top-level physical design implementation activities across FPGA product development. You will work closely with cross-functional teams to help optimize designs for timing, power, area, and manufacturability while contributing to the successful delivery of high-quality silicon.
Responsibilities
Other responsibilities of the Physical Design Engineer include but are not limited to:
  • Support block-level and/or top-level physical design implementation for FPGA and ASIC-style designs, including floorplanning, placement, clock tree synthesis, routing, and physical verification.
  • Work with senior physical design engineers to optimize designs for timing, power, area, congestion, and routability.
  • Participate in implementation tasks across the physical design flow, including netlist handoff, constraints setup, synthesis/physical design handoff, and signoff readiness.
  • Run and analyze timing, power, congestion, and design rule reports to identify issues and support closure activities.
  • Collaborate with RTL, design, DFT, CAD, and verification teams to resolve design and flow issues impacting physical implementation.
  • Support static timing analysis (STA), timing closure, and engineering change order (ECO) implementation activities.
  • Help debug physical design issues related to setup/hold violations, clocking, congestion, IR drop, or design rule violations.
  • Assist with physical verification tasks including DRC/LVS checks and design signoff preparation.
  • Develop and maintain scripts and automation to improve physical design productivity and flow efficiency.
  • Participate in silicon bring-up support and post-silicon debug activities as needed in partnership with cross-functional teams.

Salary Range
The pay range below is for Bay Area California only. Actual salary may vary based on a number of factors including job location, job-related knowledge, skills, experiences, trainings, etc. We also offer incentive opportunities that reward employees based on individual and company performance.
$105,000 - $120,000 USD
We use artificial intelligence to screen, assess, or select applicants for the position. Applicants must be eligible for any required U.S. export authorizations.
Qualifications:
Minimum Qualifications
Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related engineering field with 2+ years of industry experience in physical design, ASIC/SoC backend implementation, or a related semiconductor engineering role, including experience in the following:
  • Physical design fundamentals including floorplanning, placement, clock tree synthesis (CTS), routing, timing closure, and physical verification.
  • Experience with industry-standard physical design and signoff tools such as Cadence Innovus, Synopsys ICC2, PrimeTime, Fusion Compiler, or similar tools.
  • Understanding of static timing analysis (STA), timing constraints, setup/hold concepts, and timing closure methodologies.
  • Experience reviewing and debugging timing, congestion, area, and power reports.
  • Familiarity with physical verification concepts including DRC/LVS and signoff quality checks.
  • Exposure to scripting or automation using Tcl, Python, Perl, or similar languages.
  • Knowledge of semiconductor design flows, from RTL handoff through physical implementation and signoff.
  • Strong understanding of digital design fundamentals and CMOS/VLSI concepts.

Preferred Qualifications
  • Master's degree in Electrical Engineering, Computer Engineering, or related field.
  • Experience with advanced-node physical design methodologies and low-power implementation concepts.
  • Exposure to FPGA, SoC, or high-performance semiconductor product development.
  • Familiarity with power planning, IR drop analysis, signal integrity, electromigration (EM) analysis, or physical signoff flows.
  • Experience working in Linux/Unix-based development environments.
  • Strong problem-solving skills and the ability to work effectively in a collaborative team environment.

Job Type:
Regular
Shift:
Shift 1 (United States of America)
Primary Location:
San Jose, California, United States
Additional Locations:
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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