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Asic Physical Design Jobs (NOW HIRING)

Chip floor-planning, physical design, IP integration, static timing analysis, design validation, and required tape-out revisions. Implement and manage the layout process including floor-planning ...

SoC Physical Design Verification Engineer

Beaverton, OR · On-site

$141K - $145K/yr

... ASIC physical design and physical verification checks Scripting skills perl/python/tcl to debug flow related issues and automate checksExperienced in industry standard tools used for physical ...

Experience with hierarchical design, timing closure, physical design convergence, and power integrity analysis. * Experience with static timing analysis and concepts, defining timing constraints and ...

SoC Physical Design Methodology Engineer

Beaverton, OR · On-site

$141K - $145K/yr

... aspects of ASIC physical design and physical verification checks for hierarchical designs including full-chip flowsScripting skills perl/python/tcl to debug flow related issues and automate ...

Experience with hierarchical design, timing closure, physical design convergence, and power integrity analysis. * Experience with static timing analysis and concepts, defining timing constraints and ...

Experience with hierarchical design, timing closure, physical design convergence, and power integrity analysis. * Experience with static timing analysis and concepts, defining timing constraints and ...

Experience with hierarchical design, timing closure, physical design convergence, and power integrity analysis. * Experience with static timing analysis and concepts, defining timing constraints and ...

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Asic Physical Design information

See salary details

$95K

$141.5K

How much do asic physical design jobs pay per year?

As of Jun 21, 2026, the average yearly pay for asic physical design in the United States is $139,408.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $140,000.00 per year, depending on experience, location, and employer.

What is the difference between Asic Physical Design vs Asic Verification Engineer?

AspectAsic Physical DesignAsic Verification Engineer
Primary FocusImplementing physical layout, placement, routing of ASICsVerifying functionality and performance of ASIC designs
Skills & CertificationsVLSI design, EDA tools, CMOS fabrication knowledgeHardware description languages, simulation tools, testbench development
Work EnvironmentDesign teams, CAD tools, EDA softwareSimulation labs, testing environments, design verification teams
Industry UsageFoundries, semiconductor companies, chip design firmsASIC design companies, semiconductor firms, EDA tool providers

While both roles are integral to ASIC development, Asic Physical Design focuses on the physical implementation of chip layouts, whereas Asic Verification Engineer concentrates on testing and validating the design to ensure it meets specifications.

What are ASIC Physical Design engineers?

ASIC Physical Design engineers are professionals who take a digital circuit design and transform it into a physical layout that can be manufactured as an integrated circuit (IC) chip. They are responsible for tasks like floorplanning, placement, clock tree synthesis, routing, and ensuring the chip meets timing, power, and area requirements. Their work is critical in bridging the gap between a chip's logical design and its actual fabrication in silicon. ASIC Physical Design engineers use Electronic Design Automation (EDA) tools to optimize and verify the chip design before manufacturing. They play a key role in delivering high-performance, reliable, and cost-effective semiconductors.

What are the key skills and qualifications needed to thrive as an ASIC Physical Design Engineer, and why are they important?

To thrive as an ASIC Physical Design Engineer, you need a solid background in electrical engineering, digital logic design, and experience with the ASIC design flow, often supported by a relevant degree. Proficiency with EDA tools such as Cadence, Synopsys, or Mentor Graphics, and familiarity with scripting languages like TCL or Perl, are typically required. Strong problem-solving skills, attention to detail, and effective communication enhance collaboration within cross-functional teams. These capabilities ensure the efficient design, optimization, and delivery of high-performance, manufacturable integrated circuits.

What are some common challenges faced by ASIC Physical Design engineers during the tape-out phase, and how can they be addressed?

ASIC Physical Design engineers often encounter challenges such as meeting tight timing closure requirements, resolving signal integrity issues, and managing power consumption during the tape-out phase. These challenges require close collaboration with verification, synthesis, and DFT teams, as well as the use of industry-standard EDA tools for thorough analysis and optimization. Proactive communication, rigorous design reviews, and adopting a structured sign-off checklist can help address potential bottlenecks and ensure a successful tape-out.
More about Asic Physical Design jobs
What cities are hiring for Asic Physical Design jobs? Cities with the most Asic Physical Design job openings:
What states have the most Asic Physical Design jobs? States with the most job openings for Asic Physical Design jobs include:
Infographic showing various Asic Physical Design job openings in the United States as of June 2026, with employment types broken down into 62% Full Time, 36% Part Time, and 2% Contract. Highlights an 86% Physical, 4% Hybrid, and 10% Remote job distribution, with an average salary of $139,408 per year, or $67 per hour.
Engineer, ASIC Physical Design

Engineer, ASIC Physical Design

Micron

Minneapolis, MN • On-site

$142K - $176K/yr

Full-time

Medical, Dental, Vision, PTO

Posted 21 days ago


Micron Technology rating

8.7

Company rating: 8.7 out of 10

Based on 39 frontline employees who took The Breakroom Quiz

10th of 139 rated electronics manufacturers


Job description

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Design, analyze, and implement digital circuits used in the development of memory products. Develop groundbreaking silicon-to-systems solutions - right from technology development and advanced memory designs to product development, systems design and validation resulting in world class memory solutions. Collaborate with Micron's various design and verification teams globally to proactively design products that optimize all manufacturing functions and assure the best cost, quality, reliability, time-to-market, and customer satisfaction. Contribute to the development of new product opportunities by assisting with the overall design, layout, and optimization of Memory/Logic/Analog circuits. Chip floor-planning, physical design, IP integration, static timing analysis, design validation, and required tape-out revisions. Implement and manage the layout process including floor-planning, placement, and routing, physical verification, and final signoff for tape out. Work at various unanticipated locations throughout U.S. Work at various unanticipated locations throughout U.S. May telecommute part-time.

Employer will accept a Master's degree in Electrical Engineering, Computer Engineering or related field. Position requires:

1. Chip floor planning, placement and routing including power and clock routing or knowledge of how to modify existing scripts to manipulate the existing flow scripts.

2. Placement of macros, pins, blockage layers.

3. Static timing analysis including using Tempus (cadence) or Primetime (synopsys).

4. Place and Route: Cadence tools (Innovus/Tempus) or Synopsys tools (ICC2 or Fusion Compiler/Primetime).

5. Physical verification: Mentor tools (Calibre) or Synopsys tools (IC Validator or Hercules).

6. Customized flow development, including the use of Tcl and Cshell commands

The US base salary range that Micron Technology, Inc. estimates it could pay for this full-time position is $142,506.01 - $176,000.00. For additional pay & benefits information, please refer to the requisition at Micron.com/careers.

As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on micron.com/careers/benefits.

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.

To learn about your right to work click here.

To learn more about Micron, please visit micron.com/careers

For US Sites Only: To request assistance with the application process and/or for reasonable accommodations, please contact Micron's People Organization at hrsupport_na@micron.com or 1-800-336-8918 (select option #3)

Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.

Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.

AI alert: Candidates are encouraged to use AI tools to enhance their resume and/or application materials. However, all information provided must be accurate and reflect the candidate's true skills and experiences. Misuse of AI to fabricate or misrepresent qualifications will result in immediate disqualification.

Fraud alert: Micron advises job seekers to be cautious of unsolicited job offers and to verify the authenticity of any communication claiming to be from Micron by checking the official Micron careers website in the About Micron Technology, Inc.


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