Sr. Digital ASIC Engineer
$91K - $177K/yr
Responsibilities You will architect, design and collaborate on radio subsystems in small geometry ... Understanding of ASIC design flow (RTL design, Verficiation, Synthesis, Timing Analysis, Power ...
$91K - $177K/yr
Responsibilities You will architect, design and collaborate on radio subsystems in small geometry ... Understanding of ASIC design flow (RTL design, Verficiation, Synthesis, Timing Analysis, Power ...
$91K - $177K/yr
Responsibilities You will architect, design and collaborate on radio subsystems in small geometry ... Understanding of ASIC design flow (RTL design, Verficiation, Synthesis, Timing Analysis, Power ...
OR · On-site
$170K - $250K/yr
The Role We are seeking a Senior ASIC Physical Design Engineer to help implement advanced SoCs that power next-generation satellite and space systems. In this role, you will contribute to the full ...
Support and deliver ASIC/Digital tool/flow/methodologysolutions using Cadence tool suites to ... Drive quality improvements in design kits and documentation through ASIC design reference flow ...
Support and deliver ASIC/Digital tool/flow/methodologysolutions using Cadence tool suites to ... Drive quality improvements in design kits and documentation through ASIC design reference flow ...
Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC design in terms of timing. Key responsibilities include timing sign-off, STA and sign-off flow ...
Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC design in terms of timing. Key responsibilities include timing sign-off, STA and sign-off flow ...
Beaverton, OR · On-site
As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC design in terms of timing. Key responsibilities include timing sign-off, STA and sign-off flow development ...
Beaverton, OR · On-site
As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC design in terms of timing. Key responsibilities include timing sign-off, STA and sign-off flow development ...
Beaverton, OR · On-site
As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC design in terms of timing. Key responsibilities include timing sign-off, STA and sign-off flow development ...
Beaverton, OR · On-site
As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC design in terms of timing. Key responsibilities include timing sign-off, STA and sign-off flow development ...
Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC design in terms of timing. Key responsibilities include timing sign-off, STA and sign-off flow ...
Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC design in terms of timing. Key responsibilities include timing sign-off, STA and sign-off flow ...
OR · On-site
$190K - $280K/yr
The Role We are looking for a Principal ASIC Physical Design Engineer to lead the implementation of complex SoCs for next-generation satellite and space systems. You will own the full physical design ...
NVIDIA is seeking outstanding ASIC Verification Engineer to verify the world's leading GPUs. This ... As a senior member of our verification team, you'll understand the design & implementation with ...
NVIDIA is seeking outstanding ASIC Verification Engineer to verify the world's leading GPUs. This ... As a senior member of our verification team, you'll understand the design & implementation with ...
Beaverton, OR · On-site
$121K - $174K/yr
... mixed signal ASIC and FPGA designs. Document design work, present results, and participate in ... Engineer or related occupation performing digital or mixed signal design and verification. Must ...
Beaverton, OR · On-site
$121K - $174K/yr
... mixed signal ASIC and FPGA designs. Document design work, present results, and participate in ... Engineer or related occupation performing digital or mixed signal design and verification. Must ...
Beaverton, OR · On-site
$121K - $174K/yr
... mixed signal ASIC and FPGA designs. Document design work, present results, and participate in ... Engineer or related occupation performing digital or mixed signal design and verification. Must ...
Beaverton, OR · On-site
$121K - $174K/yr
... mixed signal ASIC and FPGA designs. Document design work, present results, and participate in ... Engineer or related occupation performing digital or mixed signal design and verification. Must ...
Hillsboro, OR · On-site
$148K - $152K/yr
At least 10 years of experience in VLSI/ASIC Design. * At least 9 years of experience in Netlist-GDS flow with Synthesis, Layout (Floorplan, Place and Route, clock tree synthesis), Static Timing ...
Hillsboro, OR · On-site
$148K - $152K/yr
At least 10 years of experience in VLSI/ASIC Design. * At least 9 years of experience in Netlist-GDS flow with Synthesis, Layout (Floorplan, Place and Route, clock tree synthesis), Static Timing ...
Hillsboro, OR · On-site
$127K/yr
You are a seasoned ASIC Design Engineer with a robust background in design automation and a keen understanding of the intricate challenges in advanced semiconductor development. Your commitment to ...
Hillsboro, OR · On-site
$127K/yr
You are a seasoned ASIC Design Engineer with a robust background in design automation and a keen understanding of the intricate challenges in advanced semiconductor development. Your commitment to ...
As a member of our verification team, you'll understand the design & implementation with focus on ... Engineering or equivalent experience * Exposure to Computer Architecture, ASIC design and ...
As a member of our verification team, you'll understand the design & implementation with focus on ... Engineering or equivalent experience * Exposure to Computer Architecture, ASIC design and ...
Track advances in AI, EDA, and hardware design research, evaluating their applicability and guiding ... High-level programming skills including experience with Python, PERL, Make, and shell scripting.
Principal IC Design Engineer, Analog Our client is seeking a Principal IC Design Engineer, Analog ... Drive all phases of the ASIC development lifecycle, including specification development, circuit ...
Principal IC Design Engineer, Analog Our client is seeking a Principal IC Design Engineer, Analog ... Drive all phases of the ASIC development lifecycle, including specification development, circuit ...
We are now looking for a Senior Logic Design Engineer! As a member of our CPU Logic Design Team ... Verilog expertise required as is a deep understanding of ASIC design flow including RTL design ...
We are now looking for a Senior Logic Design Engineer! As a member of our CPU Logic Design Team ... Verilog expertise required as is a deep understanding of ASIC design flow including RTL design ...
Hillsboro, OR · Hybrid
$106K - $198K/yr
In this role, you will be working with some of the brightest inventors and engineers in the world ... Significant ASIC and/or FPGA design experience * Ability to learn quickly and work independently
Hillsboro, OR · Hybrid
$106K - $198K/yr
In this role, you will be working with some of the brightest inventors and engineers in the world ... Significant ASIC and/or FPGA design experience * Ability to learn quickly and work independently
Hillsboro, OR · Hybrid
$106K - $198K/yr
In this role, you will be working with some of the brightest inventors and engineers in the world ... Significant ASIC and/or FPGA design experience * Ability to learn quickly and work independently
Hillsboro, OR · Hybrid
$106K - $198K/yr
In this role, you will be working with some of the brightest inventors and engineers in the world ... Significant ASIC and/or FPGA design experience * Ability to learn quickly and work independently
Hillsboro, OR · On-site
$106K - $198K/yr
In this role, you will be working with some of the brightest inventors and engineers in the world ... Significant ASIC and/or FPGA design experience * Ability to learn quickly and work independently
Hillsboro, OR · On-site
$106K - $198K/yr
In this role, you will be working with some of the brightest inventors and engineers in the world ... Significant ASIC and/or FPGA design experience * Ability to learn quickly and work independently
$99.4K - $109.8K
16% of jobs
$109.8K - $120.1K
3% of jobs
$120.1K - $130.5K
4% of jobs
$133.6K is the 25th percentile. Wages below this are outliers.
$130.5K - $140.9K
6% of jobs
The median wage is $147.4K / yr.
$140.9K - $151.3K
33% of jobs
$151.3K - $161.7K
3% of jobs
$161.7K - $172K
2% of jobs
$178.9K is the 75th percentile. Wages above this are outliers.
$172K - $182.4K
12% of jobs
$182.4K - $192.8K
5% of jobs
$192.8K - $203.2K
4% of jobs
$203.2K - $213.6K
12% of jobs
$99.4K
$158.8K
$213.6K
| Aspect | Asic Design Engineer | FPGA Design Engineer |
|---|---|---|
| Credentials | Bachelor's/Master's in Electrical Engineering or Computer Engineering | Bachelor's/Master's in Electrical Engineering or Computer Engineering |
| Work Environment | Designing custom chips for manufacturing | Developing programmable logic designs for prototyping and deployment |
| Industry Usage | Semiconductor companies, consumer electronics, automotive | Prototyping, testing, and specialized hardware applications |
Both roles require similar educational backgrounds and often overlap in skills like HDL programming. However, Asic Design Engineers focus on creating chips for mass production, while FPGA Design Engineers work on flexible, reprogrammable hardware for testing and specific applications.
An application specific integrated circuit (ASIC) is an electronic circuit created for a specific purpose, rather than for general use. ASIC design engineers create product design specification (PDS) statements for ASIC, optimize logic design, and create architectural design models. ASIC design engineers often work on a team to deliver ASIC design solutions for standard and complex computing. Knowledge of computer-aided design (CAD) tools, logic simulation, Verilog, and other hardware description languages (HDLs) is integral to career success.

$91K - $177K/yr
Full-time
Medical, Retirement, PTO
Posted 3 days ago
If you are looking for a challenging and exciting career in the world of technology, then look no further. Skyworks is an innovator of high-performance analog semiconductors whose solutions are powering the wireless networking revolution. Through our broad technology expertise and one of the most extensive product portfolios in the industry, we are Connecting Everyone and Everything, All the Time.
At Skyworks, you will find a fast-paced environment with a strong focus on global collaboration, minimal layers of management, and the freedom to make meaningful contributions in a setting that encourages creative thinking. We are excited about the opportunity to work with you and glad you want to be part of a team of talented individuals who together are changing the way the world communicates.
Requisition ID: 77738
This position is for an experienced digital design engineer working our next generation wireless audio ASICs.
You will architect, design and collaborate on radio subsystems in small geometry mixed-signal CMOS SOCs. Your primary role will be as a contributor to architecture and design in digital, including:
You will work closely with your counterparts in analog, RF, firmware, test and evaluation teams to design and ensure functional and performance requirements are met by the subsystem. Your expertise in low power SOC design, signal processing, processor cores and ASIC implementation will make you a key member of the design group.
Proven track record of exceptional performance in digital design
#LI-SJ1
The typical base pay range for this role across the U.S. is currently USD $91,200 - $177,200 per year. Starting base pay will depend on relevant experience and skills, training and education, business needs, market demands, the ultimate job duties and requirements, and work location. Skyworks has different base pay ranges for different work locations in the U.S. Benefits include access to healthcare benefits (including a premium-free medical plan option), a 401(k) plan and company match, an employee stock purchase plan, paid time off (including vacation, sick/wellness, parental leave), among others. Employees are eligible to participate in an incentive plan, and certain roles are also eligible for additional awards, including recognition and stock. These incentives and awards are based on individual and/or company performance.
Skyworks is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, age, sex, sexual orientation, gender identity, national origin, disability, protected veteran status, or any other characteristic protected by law. Skyworks strives to create an accessible workplace; if you need an accommodation due to a disability, please contact us at accommodations@skyworksinc.com.
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We are empowering the wireless networking revolution, connecting people, places and things around the world. As the demand for ubiquitous, “always-on” connectivity increasingly expands, our innovative, high performance analog semiconductors are enabling breakthrough communication platforms from global industry leaders – changing the way we live, work, play and learn. Through our broad technology expertise and one of the most extensive product portfolios in the industry, we are Connecting Everyone and Everything, All the Time.
Construction
201 - 500 Employees
Buffalo, NY, US