1

Asic Design Engineer Jobs in Oregon (NOW HIRING)

Responsibilities You will architect, design and collaborate on radio subsystems in small geometry ... Understanding of ASIC design flow (RTL design, Verficiation, Synthesis, Timing Analysis, Power ...

OR · On-site

$170K - $250K/yr

The Role We are seeking a Senior ASIC Physical Design Engineer to help implement advanced SoCs that power next-generation satellite and space systems. In this role, you will contribute to the full ...

Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC design in terms of timing. Key responsibilities include timing sign-off, STA and sign-off flow ...

As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC design in terms of timing. Key responsibilities include timing sign-off, STA and sign-off flow development ...

As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC design in terms of timing. Key responsibilities include timing sign-off, STA and sign-off flow development ...

Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC design in terms of timing. Key responsibilities include timing sign-off, STA and sign-off flow ...

OR · On-site

$190K - $280K/yr

The Role We are looking for a Principal ASIC Physical Design Engineer to lead the implementation of complex SoCs for next-generation satellite and space systems. You will own the full physical design ...

NVIDIA is seeking outstanding ASIC Verification Engineer to verify the world's leading GPUs. This ... As a senior member of our verification team, you'll understand the design & implementation with ...

Track advances in AI, EDA, and hardware design research, evaluating their applicability and guiding ... High-level programming skills including experience with Python, PERL, Make, and shell scripting.

Hardware Design Engineer

Hillsboro, OR · Hybrid

$106K - $198K/yr

In this role, you will be working with some of the brightest inventors and engineers in the world ... Significant ASIC and/or FPGA design experience * Ability to learn quickly and work independently

Hardware Design Engineer

Hillsboro, OR · Hybrid

$106K - $198K/yr

In this role, you will be working with some of the brightest inventors and engineers in the world ... Significant ASIC and/or FPGA design experience * Ability to learn quickly and work independently

Hardware Design Engineer

Hillsboro, OR · On-site

$106K - $198K/yr

In this role, you will be working with some of the brightest inventors and engineers in the world ... Significant ASIC and/or FPGA design experience * Ability to learn quickly and work independently

next page

Showing results 1-20

Asic Design Engineer information

See Oregon salary details

$99.4K

$158.8K

$213.6K

How much do asic design engineer jobs pay per year?

As of Jun 13, 2026, the average yearly pay for asic design engineer in Oregon is $158,800.00, according to ZipRecruiter salary data. Most workers in this role earn between $139,000.00 and $190,300.00 per year, depending on experience, location, and employer.

What is the difference between Asic Design Engineer vs FPGA Design Engineer?

AspectAsic Design EngineerFPGA Design Engineer
CredentialsBachelor's/Master's in Electrical Engineering or Computer EngineeringBachelor's/Master's in Electrical Engineering or Computer Engineering
Work EnvironmentDesigning custom chips for manufacturingDeveloping programmable logic designs for prototyping and deployment
Industry UsageSemiconductor companies, consumer electronics, automotivePrototyping, testing, and specialized hardware applications

Both roles require similar educational backgrounds and often overlap in skills like HDL programming. However, Asic Design Engineers focus on creating chips for mass production, while FPGA Design Engineers work on flexible, reprogrammable hardware for testing and specific applications.

What are some common challenges faced by ASIC Design Engineers during the design and verification phases?

ASIC Design Engineers often encounter challenges such as meeting strict performance and power constraints while ensuring that the design remains within budget and time limits. Debugging complex logic errors during simulation and verification can be particularly demanding, as small mistakes can have significant downstream effects. Additionally, effective communication with cross-functional teams—including software, hardware, and validation engineers—is essential to resolve integration issues and meet project milestones. Adapting to rapidly evolving tools and technologies is also a key part of the role.

Are ASIC design engineers in demand?

ASIC design engineers are in high demand due to the growth of semiconductor, consumer electronics, and telecommunications industries. Their expertise in hardware description languages like VHDL and Verilog, along with experience in FPGA and ASIC development, makes them valuable in developing custom integrated circuits for various applications.

How much do ASIC engineers get paid?

ASIC design engineers typically earn between $80,000 and $150,000 annually, depending on experience, location, and company size. Senior engineers with specialized skills or certifications can earn higher salaries, often exceeding $180,000. Compensation may also include bonuses and stock options in some organizations.

What are the key skills and qualifications needed to thrive as an ASIC Design Engineer, and why are they important?

To thrive as an ASIC Design Engineer, you need a solid background in electrical engineering, digital logic design, and proficiency with hardware description languages like Verilog or VHDL, usually backed by a relevant degree. Familiarity with EDA tools such as Synopsys or Cadence and knowledge of simulation and verification methodologies are typically required. Strong problem-solving abilities, attention to detail, and effective teamwork set outstanding engineers apart in this role. These skills and qualities are vital for delivering complex, high-performance integrated circuits that meet strict specifications and project deadlines.

What are ASIC Design Engineers?

ASIC Design Engineers are professionals who design and develop Application-Specific Integrated Circuits (ASICs), which are custom-built semiconductor chips tailored for specific applications or products. They are responsible for the entire design process, including architecture definition, logic design, verification, synthesis, and sometimes physical layout. Their work is crucial in industries like consumer electronics, telecommunications, automotive, and more, ensuring that devices have optimized performance, power efficiency, and functionality for their intended uses.

What engineers make $500,000?

Senior engineers in high-demand fields such as software engineering, data science, and specialized roles like ASIC design engineers can earn $500,000 or more annually, especially with experience, advanced skills, and in competitive industries. Executive or leadership positions in engineering firms may also reach this compensation level. Factors like location, company size, and certifications influence salary potential.

What Does an ASIC Design Engineer Do?

An application specific integrated circuit (ASIC) is an electronic circuit created for a specific purpose, rather than for general use. ASIC design engineers create product design specification (PDS) statements for ASIC, optimize logic design, and create architectural design models. ASIC design engineers often work on a team to deliver ASIC design solutions for standard and complex computing. Knowledge of computer-aided design (CAD) tools, logic simulation, Verilog, and other hardware description languages (HDLs) is integral to career success.

What is the salary of ASIC design engineer?

The salary of an ASIC design engineer typically ranges from $80,000 to $150,000 annually, depending on experience, location, and company size. Senior engineers with specialized skills in hardware description languages and verification tools tend to earn higher salaries.
What are the most commonly searched types of Asic Design Engineer jobs in Oregon? The most popular types of Asic Design Engineer jobs in Oregon are:
What are popular job titles related to Asic Design Engineer jobs in Oregon? For Asic Design Engineer jobs in Oregon, the most frequently searched job titles are:
What job categories do people searching Asic Design Engineer jobs in Oregon look for? The top searched job categories for Asic Design Engineer jobs in Oregon are:
What cities in Oregon are hiring for Asic Design Engineer jobs? Cities in Oregon with the most Asic Design Engineer job openings:
Infographic showing various Asic Design Engineer job openings in Oregon as of June 2026, with employment types broken down into 79% Full Time, 18% Part Time, and 3% Contract. Highlights an 86% Physical, 5% Hybrid, and 9% Remote job distribution, with an average salary of $158,800 per year, or $76.3 per hour.
Sr. Digital ASIC Engineer

Sr. Digital ASIC Engineer

Skyworks

Hillsboro, OR

$91K - $177K/yr

Full-time

Medical, Retirement, PTO

Posted 3 days ago


Job description

If you are looking for a challenging and exciting career in the world of technology, then look no further. Skyworks is an innovator of high-performance analog semiconductors whose solutions are powering the wireless networking revolution. Through our broad technology expertise and one of the most extensive product portfolios in the industry, we are Connecting Everyone and Everything, All the Time.

At Skyworks, you will find a fast-paced environment with a strong focus on global collaboration, minimal layers of management, and the freedom to make meaningful contributions in a setting that encourages creative thinking. We are excited about the opportunity to work with you and glad you want to be part of a team of talented individuals who together are changing the way the world communicates.

Requisition ID: 77738 

Description

This position is for an experienced digital design engineer working our next generation wireless audio ASICs.

Responsibilities

You will architect, design and collaborate on radio subsystems in small geometry mixed-signal CMOS SOCs.  Your primary role will be as a contributor to architecture and design in digital, including:

  • Full chip/block level architecture, RTL design and implementation
  • Emulation, modeling, simulation, silicon testing and debugging of digital circuits and SOCs
  • Providing technical leadership and expertise in all aspects of digital design and implementation

You will work closely with your counterparts in analog, RF, firmware, test and evaluation teams to design and ensure functional and performance requirements are met by the subsystem. Your expertise in low power SOC design, signal processing, processor cores and ASIC implementation will make you a key member of the design group.

Required Experience and Skills

Proven track record of exceptional performance in digital design

  • 5+ years (BSEE), 3+ years (MSEE) or 0+ years (PhD) of relevant industry experience
  • Experience in implementation with Verilog and System Verilog
  • Experience authoring specifications
  • Experience in architectural modeling in Matlab, Python, or C
  • Experience in Real-time data processing systems
Desired Experience and Skills
  • Understanding of ASIC design flow (RTL design, Verficiation, Synthesis, Timing Analysis, Power Analysis, Physical Design, Test)
  • Famililarity with wireless communication
    • Different modulation schemes such as pi/4 DQPSK, 16QAM, GFSK
    • Implementation of FIR/IIR filters
    • Compensation for impairments such as Carrier Frequency Offset, Symbol Timing Recovery, Channel Equalization
  • ASIC prototyping using FPGA
  • Embedded Firmware development using C (for testcase development and firmware debug)
  • Lab evaluation using oscilloscopes, logic analyzers, spectrum analyzers
  • Familiarity with Audio performance measurements (SNR, THD, SINAD, DR, etc.)
  • Familiarity with external communication interfaces (SPI, I2C, I2S, UART, JTAG, etc.) 
  • Familiarity with different processors (ARM, RISC-V)
    • Familiarity interfacing to standard bus protocols such as AHB, APB, AXI
    • Direct Memory Access controllers
  • Clock Domain Crossing techniques
  • Low power design techniques
  • Design For Test concepts
  • Skilled in various scripting languages such as python, perl, TCL, Makefiles, shell scripts

#LI-SJ1

The typical base pay range for this role across the U.S. is currently USD $91,200 - $177,200 per year. Starting base pay will depend on relevant experience and skills, training and education, business needs, market demands, the ultimate job duties and requirements, and work location. Skyworks has different base pay ranges for different work locations in the U.S. Benefits include access to healthcare benefits (including a premium-free medical plan option), a 401(k) plan and company match, an employee stock purchase plan, paid time off (including vacation, sick/wellness, parental leave), among others. Employees are eligible to participate in an incentive plan, and certain roles are also eligible for additional awards, including recognition and stock. These incentives and awards are based on individual and/or company performance. 

Skyworks is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, age, sex, sexual orientation, gender identity, national origin, disability, protected veteran status, or any other characteristic protected by law. Skyworks strives to create an accessible workplace; if you need an accommodation due to a disability, please contact us at accommodations@skyworksinc.com.


Skyworks logo

About Skyworks

Sourced by ZipRecruiter

We are empowering the wireless networking revolution, connecting people, places and things around the world. As the demand for ubiquitous, “always-on” connectivity increasingly expands, our innovative, high performance analog semiconductors are enabling breakthrough communication platforms from global industry leaders – changing the way we live, work, play and learn. Through our broad technology expertise and one of the most extensive product portfolios in the industry, we are Connecting Everyone and Everything, All the Time.

Industry

Construction

Company size

201 - 500 Employees

Headquarters location

Buffalo, NY, US