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Verilog Jobs (NOW HIRING)

Santa Clara, CA/Remote Minimum 10 years of strong experience in Digital design at RTL level using Verilog/System Verilog Experience in developing micro architectural document from requirements ...

Design Verification Lead Engineer

Austin, TX · On-site

$134.80K - $164.50K/yr

Proficiency in C-shell scripting, Verilog-HDL & System Verilog. * Strong knowledge in SV Assertions, UVM/OVM and functional code coverage. * SOC Verification experience using ARM Cortex ...

The ideal candidate will have strong expertise in VHDL or Verilog HDL coding and simulation, along with experience using ModelSim and Xilinx tools. Key Responsibilities: * Implement FPGA-based ...

The ideal candidate will have strong expertise in VHDL or Verilog HDL coding and simulation, along with experience using ModelSim and Xilinx tools. Key Responsibilities: * Implement FPGA-based ...

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Verilog information

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$88K

$156.1K

$207K

How much do verilog jobs pay per year?

As of May 28, 2026, the average yearly pay for verilog in the United States is $156,077.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $175,500.00 per year, depending on experience, location, and employer.

What is a Verilog job?

A Verilog job typically involves designing, simulating, and verifying digital circuits using Verilog, a hardware description language (HDL). Engineers in this role work on FPGA and ASIC development for applications such as processors, communication systems, and embedded hardware. Responsibilities often include writing Verilog code, performing design synthesis, and debugging hardware using simulation tools. Verilog engineers are commonly employed in semiconductor, aerospace, and consumer electronics industries.

What are the key skills and qualifications needed to thrive in the Verilog position, and why are they important?

To excel in a Verilog role, you need a deep understanding of digital logic design, hardware description languages (especially Verilog), and often a degree in electrical or computer engineering. Experience with simulation tools like ModelSim, EDA tools such as Synopsys or Cadence, and potentially industry certifications like FPGA or ASIC design are highly valued. Strong analytical thinking, problem-solving skills, and effective teamwork are important soft skills in this field. These competencies are essential for creating reliable, efficient hardware designs and collaborating within multidisciplinary engineering teams.

What does a typical day-to-day workflow look like for someone working with Verilog?

A typical day in a Verilog role involves writing and modifying Verilog code to describe digital circuits, running simulations to verify design functionality, and debugging hardware issues in collaboration with other engineers. You might also interact with hardware engineers, verification teams, and project managers to ensure project milestones are met. Regular review meetings and design documentation are integral parts of the workflow, and you’ll often switch between independent tasks and team-based problem-solving. The work environment is usually dynamic and deadline-driven, offering opportunities to learn about cutting-edge hardware technologies.
What cities are hiring for Verilog jobs? Cities with the most Verilog job openings:
What are the most commonly searched types of Verilog jobs? The most popular types of Verilog jobs are:
What states have the most Verilog jobs? States with the most job openings for Verilog jobs include:
Infographic showing various Verilog job openings in the United States as of May 2026, with employment types broken down into 97% Full Time, and 3% Contract. Highlights an 92% Physical, 5% Hybrid, and 3% Remote job distribution, with an average salary of $156,077 per year, or $75 per hour.

Other

Posted 24 days ago


Job description

Principal Verification Engineer

Job Description:

  • Independently architect UVM based verification environments including drivers, monitors, scoreboards, functional checkers, functional coverage.
  • Innovative in functional coverage techniques and stress verification with testing all corners of DV - Passing/Failing/Error/breaking scenarios for DUT.
  • Own verification at module and/or full chip level.
  • Proficiency in System Verilog and advanced UVM methodologies is a must.
  • Good experience in System Verilog assertions.
  • Own the development of test plans, test environments and test suites used to verify complex Ethernet and Microcontroller SOC products.
  • Prior experience as a verification lead is preferred.
  • Prior experience of working with and guiding the junior members of the team is required.

Responsibilities:

  • Product verification test plan specification
  • Drive verification methodologies and practices
  • Develop System Verilog verification IP
  • Develop chip/block level test environments
  • Develop and debug test suites
  • Lead and mentor other verification engineers