Staff FPGA Engineer
Reston, VA · On-site
$150K - $195K/yr
This requires strong skills in digital circuit design, VHDL/Verilog coding, and simulation to ... contractual requirements which may cause an offer to fall outside of this range.
Staff FPGA Engineer
Reston, VA · On-site
$150K - $195K/yr
This requires strong skills in digital circuit design, VHDL/Verilog coding, and simulation to ... contractual requirements which may cause an offer to fall outside of this range.
Staff FPGA Engineer
$150K - $195K/yr
This requires strong skills in digital circuit design, VHDL/Verilog coding, and simulation to ... include contractual requirements which may cause an offer to fall outside of this range.
Staff FPGA Engineer
$150K - $195K/yr
This requires strong skills in digital circuit design, VHDL/Verilog coding, and simulation to ... include contractual requirements which may cause an offer to fall outside of this range.
Staff FPGA Engineer with Security Clearance
Reston, VA · On-site
$150K - $195K/yr
This requires strong skills in digital circuit design, VHDL/Verilog coding, and simulation to ... contractual requirements which may cause an offer to fall outside of this range.
Staff FPGA Engineer with Security Clearance
Reston, VA · On-site
$150K - $195K/yr
This requires strong skills in digital circuit design, VHDL/Verilog coding, and simulation to ... contractual requirements which may cause an offer to fall outside of this range.
VP Systems Engineering
Irvine, CA · On-site
$193K - $249K/yr
Responsible for timely deliveries of all contractual Obligations of the Systems Division. Handles ... OrCAD, Altium, PSpice, and Verilog, PCB design and testing Solid time management skills and ...
VP Systems Engineering
Irvine, CA · On-site
$193K - $249K/yr
Responsible for timely deliveries of all contractual Obligations of the Systems Division. Handles ... OrCAD, Altium, PSpice, and Verilog, PCB design and testing Solid time management skills and ...
VP, System Engineering
Irvine, CA · On-site
$193K - $249K/yr
Responsible for timely deliveries of all contractual Obligations of the Systems Division. * Handles ... OrCAD, Altium, PSpice, and Verilog, PCB design and testing * Solid time management skills and ...
VP, System Engineering
Irvine, CA · On-site
$193K - $249K/yr
Responsible for timely deliveries of all contractual Obligations of the Systems Division. * Handles ... OrCAD, Altium, PSpice, and Verilog, PCB design and testing * Solid time management skills and ...
... Verilog/System Verilog and microarchitecture. * 4 years of experience in leading IP/SoC design ... Alphabet Inc. is your sole contractual partner with respect to equity grants. GSU grants are not ...
... Verilog/System Verilog and microarchitecture. * 4 years of experience in leading IP/SoC design ... Alphabet Inc. is your sole contractual partner with respect to equity grants. GSU grants are not ...
FPGA Engineer with Security Clearance
Tucson, AZ · On-site
$111K - $143K/yr
PTO
... using System Verilog - Verification utilizing emulation platforms, such as Veloce Benefit selection, customer contractual specifications, relevant work experience, skills, competencies ...
FPGA Engineer with Security Clearance
Tucson, AZ · On-site
$111K - $143K/yr
PTO
... using System Verilog - Verification utilizing emulation platforms, such as Veloce Benefit selection, customer contractual specifications, relevant work experience, skills, competencies ...
Senior FPGA Design and Verification Engineer with Security Clearance
Tucson, AZ · On-site
$105K - $145K/yr
PTO
... using System Verilog - Verification utilizing emulation platforms, such as Veloce Benefit selection, customer contractual specifications, relevant work experience, skills, competencies ...
Senior FPGA Design and Verification Engineer with Security Clearance
Tucson, AZ · On-site
$105K - $145K/yr
PTO
... using System Verilog - Verification utilizing emulation platforms, such as Veloce Benefit selection, customer contractual specifications, relevant work experience, skills, competencies ...
FPGA Engineer
Tewksbury, MA · On-site
$80K - $190K/yr
Medical
Dental
Vision
Life
Retirement
PTO
Demonstrated experience with VHDL or Verilog * Experience with FPGA platforms - AMD/Xilinx, Intel ... contractual rates. This position requires eligibility to obtain a DOD Secret Security Clearance ...
FPGA Engineer
Tewksbury, MA · On-site
$80K - $190K/yr
Medical
Dental
Vision
Life
Retirement
PTO
Demonstrated experience with VHDL or Verilog * Experience with FPGA platforms - AMD/Xilinx, Intel ... contractual rates. This position requires eligibility to obtain a DOD Secret Security Clearance ...
Senior RTL Design Engineer
Mountain View, CA · On-site
$192 - $279/hr
Experience in ASIC development with Verilog or VHDL (Vhsic Hardware Description Language ... Alphabet Inc. is your sole contractual partner with respect to equity grants. GSU grants are not ...
Senior RTL Design Engineer
Mountain View, CA · On-site
$192 - $279/hr
Experience in ASIC development with Verilog or VHDL (Vhsic Hardware Description Language ... Alphabet Inc. is your sole contractual partner with respect to equity grants. GSU grants are not ...
FPGA Engineer
$80K - $190K/yr
Medical
Dental
Vision
Life
Retirement
PTO
Demonstrated experience with VHDL or Verilog * Experience with FPGA platforms - AMD/Xilinx, Intel ... contractual rates. This position requires eligibility to obtain a DOD Secret Security Clearance; US ...
FPGA Engineer
$80K - $190K/yr
Medical
Dental
Vision
Life
Retirement
PTO
Demonstrated experience with VHDL or Verilog * Experience with FPGA platforms - AMD/Xilinx, Intel ... contractual rates. This position requires eligibility to obtain a DOD Secret Security Clearance; US ...
FPGA Engineer with Security Clearance
Tewksbury, MA · On-site
$80K - $190K/yr
Medical
Dental
Vision
Life
Retirement
PTO
... Verilog • Experience with FPGA platforms - AMD/Xilinx, Intel/Altera, or Microchip (Altera ... contractual rates. This position requires eligibility to obtain a DOD Secret Security Clearance; US ...
FPGA Engineer with Security Clearance
Tewksbury, MA · On-site
$80K - $190K/yr
Medical
Dental
Vision
Life
Retirement
PTO
... Verilog • Experience with FPGA platforms - AMD/Xilinx, Intel/Altera, or Microchip (Altera ... contractual rates. This position requires eligibility to obtain a DOD Secret Security Clearance; US ...
FPGA Engineer
Tewksbury, MA · On-site
$80K - $190K/yr
Medical
Dental
Vision
Life
Retirement
PTO
Demonstrated experience with VHDL or Verilog * Experience with FPGA platforms - AMD/Xilinx, Intel ... contractual rates. This position requires eligibility to obtain a DOD Secret Security Clearance; US ...
FPGA Engineer
Tewksbury, MA · On-site
$80K - $190K/yr
Medical
Dental
Vision
Life
Retirement
PTO
Demonstrated experience with VHDL or Verilog * Experience with FPGA platforms - AMD/Xilinx, Intel ... contractual rates. This position requires eligibility to obtain a DOD Secret Security Clearance; US ...
Silicon Design Verification Manager
Austin, TX · On-site
$134K - $164K/yr
Object Oriented design verification coding (System Verilog or C ); Testbench architecture design ... Alphabet Inc. is your sole contractual partner with respect to equity grants. GSU grants are not ...
Silicon Design Verification Manager
Austin, TX · On-site
$134K - $164K/yr
Object Oriented design verification coding (System Verilog or C ); Testbench architecture design ... Alphabet Inc. is your sole contractual partner with respect to equity grants. GSU grants are not ...
System Verilog) and related design processes (e.g., Lint, UPF). Preferred qualifications: * PhD in ... Alphabet Inc. is your sole contractual partner with respect to equity grants. GSU grants are not ...
System Verilog) and related design processes (e.g., Lint, UPF). Preferred qualifications: * PhD in ... Alphabet Inc. is your sole contractual partner with respect to equity grants. GSU grants are not ...
... Verilog or SystemVerilog. * Experience with logic synthesis techniques to optimize RTL code ... Alphabet Inc. is your sole contractual partner with respect to equity grants. GSU grants are not ...
... Verilog or SystemVerilog. * Experience with logic synthesis techniques to optimize RTL code ... Alphabet Inc. is your sole contractual partner with respect to equity grants. GSU grants are not ...
Reverse Engineer for RF Systems
Laurel, MD · On-site
Medical
Dental
Vision
Life
Retirement
PTO
Have experience with VHDL, Verilog, or other FPGA development languages * Have developed novel ... APL may offer bonuses or other forms of compensation per internal policy and/or contractual ...
Reverse Engineer for RF Systems
Laurel, MD · On-site
Medical
Dental
Vision
Life
Retirement
PTO
Have experience with VHDL, Verilog, or other FPGA development languages * Have developed novel ... APL may offer bonuses or other forms of compensation per internal policy and/or contractual ...
Experience in ASIC development with Verilog or VHDL (Vhsic Hardware Description Language ... Alphabet Inc. is your sole contractual partner with respect to equity grants. GSU grants are not ...
Experience in ASIC development with Verilog or VHDL (Vhsic Hardware Description Language ... Alphabet Inc. is your sole contractual partner with respect to equity grants. GSU grants are not ...
Reverse Engineer for RF Systems with Security Clearance
Laurel, MD · On-site
Medical
Dental
Vision
Life
Retirement
PTO
Have experience with VHDL, Verilog, or other FPGA development languages * Have developed novel ... APL may offer bonuses or other forms of compensation per internal policy and/or contractual ...
Reverse Engineer for RF Systems with Security Clearance
Laurel, MD · On-site
Medical
Dental
Vision
Life
Retirement
PTO
Have experience with VHDL, Verilog, or other FPGA development languages * Have developed novel ... APL may offer bonuses or other forms of compensation per internal policy and/or contractual ...
Embedded Systems Design Engineer
Laurel, MD · On-site
Medical
Dental
Vision
Life
Retirement
PTO
Have experience with VHDL, Verilog, or other FPGA development languages. * Have experience in ... APL may offer bonuses or other forms of compensation per internal policy and/or contractual ...
Embedded Systems Design Engineer
Laurel, MD · On-site
Medical
Dental
Vision
Life
Retirement
PTO
Have experience with VHDL, Verilog, or other FPGA development languages. * Have experience in ... APL may offer bonuses or other forms of compensation per internal policy and/or contractual ...
Contractual Verilog information
See salary details
$19.47 - $25.13
2% of jobs
$25.13 - $30.79
5% of jobs
$30.79 - $36.45
3% of jobs
$36.45 - $42.11
0% of jobs
$42.11 - $47.77
6% of jobs
$52.90 is the 25th percentile. Wages below this are outliers.
$47.77 - $53.43
9% of jobs
$53.43 - $59.09
15% of jobs
The median wage is $60.55 / hr.
$59.09 - $64.75
35% of jobs
$64.75 - $70.41
9% of jobs
$70.41 - $76.07
8% of jobs
$76.07 - $81.73
8% of jobs
$19
$59
$81
How much do contractual verilog jobs pay per hour?
As of Aug 14, 2026, the average hourly pay for contractual verilog in the United States is $59.59, according to ZipRecruiter salary data. Most workers in this role earn between $51.92 and $66.35 per hour, depending on experience, location, and employer.
What is the difference between Contractual Verilog vs FPGA Designer?
| Aspect | Contractual Verilog | FPGA Designer |
|---|---|---|
| Credentials | Verilog proficiency, sometimes certifications in HDL | Verilog/VHDL expertise, FPGA design certifications |
| Work Environment | Contract-based, project-specific | Full-time or contract, design and development focus |
| Industry Usage | Used in hardware design, verification projects | Designing FPGA hardware, implementing digital systems |
Contractual Verilog professionals focus on writing and verifying Verilog code for specific projects, often on a contractual basis. FPGA Designers typically have broader responsibilities in designing, simulating, and implementing FPGA-based systems. While both roles require Verilog skills, FPGA Designers usually have more comprehensive design responsibilities and may hold additional certifications or experience in FPGA development.
More about Contractual Verilog jobs
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Cities with the most Contractual Verilog job openings:
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The most popular types of Verilog jobs are:
What states have the most Contractual Verilog jobs?
States with the most job openings for Contractual Verilog jobs include:
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Job description
Overview
VTG is seeking a Staff FPGA (Field Programmable Gate Array) Engineer to support our Defense customer in Reston, VA. Our Staff FPGA Engineer will be responsible for rapidly developing, testing, and implementing FPGA designs on Xilinx SoC/FPGA platforms. This requires strong skills in digital circuit design, VHDL/Verilog coding, and simulation to contribute to projects that are shaping the future of defense.
What will you do?
Do you have what it takes?
Preferred Qualifications:
Contingent Upon Contract Award
VTG's estimated starting pay range is $150,000-$195,000 which is a general guideline for the geographic location. When extending an offer, VTG also considers work experience, education, skill level, market considerations and may possibly include contractual requirements which may cause an offer to fall outside of this range.
VTG is seeking a Staff FPGA (Field Programmable Gate Array) Engineer to support our Defense customer in Reston, VA. Our Staff FPGA Engineer will be responsible for rapidly developing, testing, and implementing FPGA designs on Xilinx SoC/FPGA platforms. This requires strong skills in digital circuit design, VHDL/Verilog coding, and simulation to contribute to projects that are shaping the future of defense.
What will you do?
- Integrate third-party vendors IP, as necessary
- Participate in entire design life cycle: from requirements and concept, through design and hand on testing/board bring up
- Implement a variety of signal types such as high speed comms (ethernet, serial), signal processing (analog, digital)
- Ensure designs meet all relevant safety and performance standards, with traceability back to top-level system requirements, as necessary
- Investigate and resolve bugs found during hand on testing (at HDL level and system level)
Do you have what it takes?
- Bachelors degree in Electrical Engineering, Electronics Engineering, Computer Engineering or related field
- 12+ years of professional experience in FPGA design and development. Experience with Xilinx SoC is highly preferred
- Familiarity with design software like Vivado (preferred), ModelSim, or Quartus
- Proficient in VHDL and/or Verilog
- Experience in SoC hardware bring-up, preferably on ARM-based systems
- Ability to work in a fast-paced, challenging environment
- Excellent problem-solving and organizational skills
- Strong communication and teamwork skills
- Currently possesses and is able to maintain an active U.S. Secret security clearance
Preferred Qualifications:
- Working knowledge of designing for safety-critical functions
- FPGA interfaces and high speed busses
- Experience with systems on a Chip (SoC)
- Low-level firmware (C/C++) development for bring-up and test
Contingent Upon Contract Award
VTG's estimated starting pay range is $150,000-$195,000 which is a general guideline for the geographic location. When extending an offer, VTG also considers work experience, education, skill level, market considerations and may possibly include contractual requirements which may cause an offer to fall outside of this range.