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Contractual Verilog Jobs (NOW HIRING)

Google

Senior RTL Design Engineer

Mountain View, CA · On-site

Experience in ASIC development with Verilog or VHDL (Vhsic Hardware Description Language ... Alphabet Inc. is your sole contractual partner with respect to equity grants. GSU grants are not ...

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Contractual Verilog information

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How much do contractual verilog jobs pay per hour?

As of Aug 7, 2026, the average hourly pay for contractual verilog in the United States is $59.59, according to ZipRecruiter salary data. Most workers in this role earn between $51.92 and $66.35 per hour, depending on experience, location, and employer.

What is the difference between Contractual Verilog vs FPGA Designer?

AspectContractual VerilogFPGA Designer
CredentialsVerilog proficiency, sometimes certifications in HDLVerilog/VHDL expertise, FPGA design certifications
Work EnvironmentContract-based, project-specificFull-time or contract, design and development focus
Industry UsageUsed in hardware design, verification projectsDesigning FPGA hardware, implementing digital systems

Contractual Verilog professionals focus on writing and verifying Verilog code for specific projects, often on a contractual basis. FPGA Designers typically have broader responsibilities in designing, simulating, and implementing FPGA-based systems. While both roles require Verilog skills, FPGA Designers usually have more comprehensive design responsibilities and may hold additional certifications or experience in FPGA development.

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What cities are hiring for Contractual Verilog jobs? Cities with the most Contractual Verilog job openings:
What are the most commonly searched types of Verilog jobs? The most popular types of Verilog jobs are:
What states have the most Contractual Verilog jobs? States with the most job openings for Contractual Verilog jobs include:
What job categories do people searching Contractual Verilog jobs look for? The top searched job categories for Contractual Verilog jobs are:
Contractual Verilog jobs near you
Infographic showing various Contractual Verilog job openings in the United States as of August 2026, with employment types broken down into 88% Full Time, 10% Part Time, and 2% Contract. Highlights an 91% Physical, 3% Hybrid, and 6% Remote job distribution, with an average salary of $123,952 per year, or $59.6 per hour.

Senior RTL Design Engineer

Google

Mountain View, CA • On-site

Full-time

Posted 22 days ago

Google rating

8.9

Company rating: 8.9 out of 10

Based on 102 frontline employees who took The Breakroom Quiz

40th of 242 rated software companies

Job description

Minimum qualifications:
  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
  • 10 years of experience with IP Development or Integration.
  • Experience in ASIC development with Verilog or VHDL (Vhsic Hardware Description Language).
  • Experience with a scripting language (e.g., Python or Perl).

Preferred qualifications:
  • Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
  • Experience with ASIC design methodologies for clock domain checks, reset checks, and low power design.
  • Knowledge of one of these areas: processor cores, buses/fabric/NoC, debug/trace, interrupts, clocks/reset.
  • Knowledge of high-performance and low-power design techniques.
  • Knowledge of ASIC Verification, DFT, synthesis, STA, or physical design.
  • Knowledge of FPGA and emulation platforms.

About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Individual pay is determined by factors including job-related skills, experience, and relevant education or training.
US: $192000 - $279000 (USD) 20% bonus target equity benefits
Learn more about benefits at Google .
Responsibilities
  • Define the detailed microarchitecture specifications for silicon subsystems and small to medium-sized intellectual property blocks to meet performance, area, and power requirements.
  • Integrate internal and external intellectual property (IP) blocks seamlessly into complex silicon designs and multi-component subsystems.
  • Execute production-grade RTL coding, debug intricate function and performance simulation issues, and conduct standard lint, clock domain crossing, formal verification, and unified power format checks.
  • Partner closely with validation teams during test plan formulation and coverage analysis for comprehensive subsystem and chip-level design verification.
  • Drive technical alignment across multi-disciplinary and multi-site engineering groups to resolve architectural issues and ensure successful product delivery.

Information collected and processed as part of your Google Careers profile, and any job applications you choose to submit is subject to Google's Applicant and Candidate Privacy Policy .
Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents-to-be, criminal histories consistent with legal requirements, or any other basis protected by law. See also Google's EEO Policy , Know your rights: workplace discrimination is illegal , Belonging at Google , and How we hire .
If you have a need that requires accommodation, please let us know by completing our Accommodations for Applicants form .
Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting.
To all recruitment agencies: Google does not accept agency resumes. Please do not forward resumes to our jobs alias, Google employees, or any other organization location. Google is not responsible for any fees related to unsolicited resumes.
Equity is granted exclusively and discretionarily by Alphabet Inc. on the basis of an agreement concluded between you and Alphabet Inc. Alphabet Inc. is your sole contractual partner with respect to equity grants. GSU grants are not guaranteed, are discretionary, are subject to approval by the Alphabet Inc. board of directors or its delegate, the terms of the relevant Alphabet Inc. stock plan, and your grant agreement. They have no impact on statutory payments. Current or past grants do not confer an acquired right.

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