RTL Verification Engineer
$134.80K - $164.50K/yr
Has used modern verification methodologies such UVM/VMM/OVM. UVM is preferred. Experience verifying and debugging RTL , preferably in context of CPU, GPU, video, display or signal processing system.
$134.80K - $164.50K/yr
Has used modern verification methodologies such UVM/VMM/OVM. UVM is preferred. Experience verifying and debugging RTL , preferably in context of CPU, GPU, video, display or signal processing system.
$134.80K - $164.50K/yr
Has used modern verification methodologies such UVM/VMM/OVM. UVM is preferred. Experience verifying and debugging RTL , preferably in context of CPU, GPU, video, display or signal processing system.
Redwood City, CA · On-site
$166.40K - $203.10K/yr
We are seeking a Sr. RTL Verification Engineer to join our team in Redwood City to bring the power of generative AI to enhance and speed the design and manufacture of complex semiconductors.
Redwood City, CA · On-site
$166.40K - $203.10K/yr
We are seeking a Sr. RTL Verification Engineer to join our team in Redwood City to bring the power of generative AI to enhance and speed the design and manufacture of complex semiconductors.
Austin, TX · On-site
$70 - $80/hr
RTL Verification Role Overview: We are seeking a seasoned Verification Lead with expertise or strong interest in IO/PHY verification. The ideal candidate will have a proven track record in IP ...
Quick apply
Austin, TX · On-site
$70 - $80/hr
RTL Verification Role Overview: We are seeking a seasoned Verification Lead with expertise or strong interest in IO/PHY verification. The ideal candidate will have a proven track record in IP ...
San Jose, CA · On-site
$101.50K/yr
Collaborate closely with RTL, verification, and methodology teams to integrate the tool into frontend and verification workflows * Design and execute tool-qualification regressions across complex AMD ...
San Jose, CA · On-site
$101.50K/yr
Collaborate closely with RTL, verification, and methodology teams to integrate the tool into frontend and verification workflows * Design and execute tool-qualification regressions across complex AMD ...
San Jose, CA · On-site
$159.70K - $195K/yr
Collaborate closely with RTL, verification, and methodology teams to integrate the tool into frontend and verification workflows * Design and execute toolqualification regressions across complex AMD ...
San Jose, CA · On-site
$159.70K - $195K/yr
Collaborate closely with RTL, verification, and methodology teams to integrate the tool into frontend and verification workflows * Design and execute toolqualification regressions across complex AMD ...
... RTL Verification engineer Location: Santa Clara or Chandler, AZ Duration: 3 - 6 months Specific Verification methodologies preferred - OVM Any interface experience ? Like USB, PCIe, Ethernet, etc.
... RTL Verification engineer Location: Santa Clara or Chandler, AZ Duration: 3 - 6 months Specific Verification methodologies preferred - OVM Any interface experience ? Like USB, PCIe, Ethernet, etc.
$180K - $320K/yr
Own block-level RTL verification across our AI accelerator ASIC. * Build testbenches, drive coverage closure, and use AI-assisted tool flows to accelerate verification timelines. What we're looking ...
Quick apply
$180K - $320K/yr
Own block-level RTL verification across our AI accelerator ASIC. * Build testbenches, drive coverage closure, and use AI-assisted tool flows to accelerate verification timelines. What we're looking ...
Palo Alto, CA · On-site
$159.90K/yr
You'll collaborate closely with RTL, verification, and ML research teams to develop hybrid formal engines that reason about AI-generated hardware at scale. You'll define formal properties, automate ...
Palo Alto, CA · On-site
$159.90K/yr
You'll collaborate closely with RTL, verification, and ML research teams to develop hybrid formal engines that reason about AI-generated hardware at scale. You'll define formal properties, automate ...
San Francisco, CA · On-site
$160.20K - $195.60K/yr
As a Wireless Design Verification Engineer, you will be responsible for pre-silicon RTL verification of wireless MAC and its interfaces with the rest of the wireless SoC. You will interact with DV ...
San Francisco, CA · On-site
$160.20K - $195.60K/yr
As a Wireless Design Verification Engineer, you will be responsible for pre-silicon RTL verification of wireless MAC and its interfaces with the rest of the wireless SoC. You will interact with DV ...
Palo Alto, CA · On-site
$159.90K/yr
You'll collaborate closely with RTL, verification, and ML research teams to develop hybrid formal engines that reason about AI-generated hardware at scale. You'll define formal properties, automate ...
Quick apply
Palo Alto, CA · On-site
$159.90K/yr
You'll collaborate closely with RTL, verification, and ML research teams to develop hybrid formal engines that reason about AI-generated hardware at scale. You'll define formal properties, automate ...
$139.80K - $170.60K/yr
You will be responsible for RTL verification at both the unit and system level, as well as creating and maintaining the verification environment and test cases. A key aspect of this job is closely ...
$139.80K - $170.60K/yr
You will be responsible for RTL verification at both the unit and system level, as well as creating and maintaining the verification environment and test cases. A key aspect of this job is closely ...
San Francisco, CA · On-site
$160.20K - $195.60K/yr
As a PHY Design Verification Engineer, you will be responsible for pre-silicon RTL verification of wireless PHY and its interfaces with the rest of the wireless communication SoC. You will interact ...
San Francisco, CA · On-site
$160.20K - $195.60K/yr
As a PHY Design Verification Engineer, you will be responsible for pre-silicon RTL verification of wireless PHY and its interfaces with the rest of the wireless communication SoC. You will interact ...
$120K - $192K/yr
Strong expertise in RTL verification methodologies , including System Verilog * Experience with ASIC verification flows and design verification methodologies * Proficiency in UVM/OVM , Python, C/C ...
$120K - $192K/yr
Strong expertise in RTL verification methodologies , including System Verilog * Experience with ASIC verification flows and design verification methodologies * Proficiency in UVM/OVM , Python, C/C ...
$127K - $155K/yr
You'll be responsible for block and sub-system level pre-silicon RTL verification. You will also support the top and post-silicon validation teams in ensuring the successful integration of our IPs ...
$127K - $155K/yr
You'll be responsible for block and sub-system level pre-silicon RTL verification. You will also support the top and post-silicon validation teams in ensuring the successful integration of our IPs ...
San Jose, CA · On-site
$120K - $192K/yr
Strong expertise in RTL verification methodologies , including System Verilog * Experience with ASIC verification flows and design verification methodologies * Proficiency in UVM/OVM , Python, C/C ...
San Jose, CA · On-site
$120K - $192K/yr
Strong expertise in RTL verification methodologies , including System Verilog * Experience with ASIC verification flows and design verification methodologies * Proficiency in UVM/OVM , Python, C/C ...
$142.60K - $206.50K/yr
Altera is responsible for High-Speed Protocol IP development, which includes participating in high-level product specifications, logic/RTL design and implementation, RTL verification, IP FPGA ...
$142.60K - $206.50K/yr
Altera is responsible for High-Speed Protocol IP development, which includes participating in high-level product specifications, logic/RTL design and implementation, RTL verification, IP FPGA ...
Santa Clara, CA · On-site
$160.70K/yr
Well, we're verifying high throughput complex SOCs, and you'll get to drive the pre-silicon RTL verification of the full chip. * We are working daily to ensure the quality of the SOC by working ...
Santa Clara, CA · On-site
$160.70K/yr
Well, we're verifying high throughput complex SOCs, and you'll get to drive the pre-silicon RTL verification of the full chip. * We are working daily to ensure the quality of the SOC by working ...
Orlando, FL · On-site
$127K - $155K/yr
In this role, you'll be responsible for block and sub-system level pre-silicon RTL verification of embedded graphics cores. You will also support the top and post-silicon validation teams in ensuring ...
Orlando, FL · On-site
$127K - $155K/yr
In this role, you'll be responsible for block and sub-system level pre-silicon RTL verification of embedded graphics cores. You will also support the top and post-silicon validation teams in ensuring ...
$127K - $155K/yr
In this role, you'll be responsible for block and sub-system level pre-silicon RTL verification of embedded graphics cores. You will also support the top and post-silicon validation teams in ensuring ...
$127K - $155K/yr
In this role, you'll be responsible for block and sub-system level pre-silicon RTL verification of embedded graphics cores. You will also support the top and post-silicon validation teams in ensuring ...
San Jose, CA · On-site
$142.60K - $206.50K/yr
Altera is responsible for High-Speed Protocol IP development, which includes participating in high-level product specifications, logic/RTL design and implementation, RTL verification, IP FPGA ...
San Jose, CA · On-site
$142.60K - $206.50K/yr
Altera is responsible for High-Speed Protocol IP development, which includes participating in high-level product specifications, logic/RTL design and implementation, RTL verification, IP FPGA ...
$88K - $98.8K
9% of jobs
$98.8K - $109.6K
2% of jobs
$109.6K - $120.5K
2% of jobs
$120.5K - $131.3K
4% of jobs
$135.1K is the 25th percentile. Wages below this are outliers.
$131.3K - $142.1K
22% of jobs
$142.1K - $152.9K
4% of jobs
The median wage is $163.7K / yr.
$152.9K - $163.7K
6% of jobs
$173.1K is the 75th percentile. Wages above this are outliers.
$163.7K - $174.5K
29% of jobs
$174.5K - $185.4K
9% of jobs
$185.4K - $196.2K
6% of jobs
$196.2K - $207K
6% of jobs
$88K
$156.1K
$207K
| Aspect | Rtl Verification | Logic Verification |
|---|---|---|
| Required Credentials | Bachelor's in Electrical Engineering, VLSI Design, or related fields; knowledge of hardware description languages (HDLs) | Bachelor's in Electrical Engineering, Computer Engineering, or related fields; familiarity with HDL and verification tools |
| Work Environment | ASIC/FPGA design teams, hardware development labs | Hardware design teams, verification and validation departments |
| Industry Usage | Primarily in semiconductor, electronics, and hardware design companies | Electronics, semiconductor, and integrated circuit industries |
Rtl Verification focuses on verifying the Register Transfer Level design to ensure correctness before fabrication, while Logic Verification encompasses broader testing of logical functions at various levels. Both roles require similar skills and often overlap, but Rtl Verification is more specialized in hardware description languages and early-stage design validation.

$134.80K - $164.50K/yr
Contractor
Posted 9 days ago
Job Title, Lab:
Contractor Verification Engineer, APL
General Description Vision:
Perform pre-silicon validation of GPU unit(s).
Responsibilities Include:
Learn the architecture and micro architecture by studying specifications and direct interaction with architects and logic designers.
Review unit level test plans; modify if necessary.
Write the tests outlined by test plan. Enhance testbench if necessary, e.g. add coverage assertions.
Debug test failures, fix test or testbench if necessary. Report RTL failures to RTL designers. Confirm bug is fixed.
Enhance test benches and tests to achieve coverage goals.
Support debug of unit in upper levels of design hierarchy.
Experience Requirements:
Has used modern verification methodologies such UVM/VMM/OVM. UVM is preferred.
Experience verifying and debugging RTL , preferably in context of CPU, GPU, video, display or signal processing system.
Understanding of micro-architecture and logic design fundamentals, e.g. finite state machines, arithmetic data path pipelines.
Composed functional coverage assertions, preferably using system Verilog.
The qualified candidate will possess the following:
BSEE or higher degree.
At least 2 years of industry experience in a design verification role.
Proficient in System Verilog. C++, Python/Perl skills are also desirable.
Good verbal and written communication skills.
All your information will be kept confidential according to EEO guidelines.
Sourced by ZipRecruiter
Manufacturing
51 - 200 Employees
Milpitas, CA, US
2005