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Temporary Rtl Verification Jobs (NOW HIRING)

Digital IC Design Engineer

Austin, TX · On-site

$116K - $233K/yr

Micro-architecture design and RTL implementation of: * Low-power digital signal processors * Low ... Collaboration on silicon bring-up tests with verification engineers Required Qualifications:

Coursework or project experience with Computer Architecture, RTL Design, ML systems, or performance ... The hourly rate for this temporary internship position is $45.00/hour to $60.00/hour. The actual ...

Coursework or project experience with Computer Architecture, RTL Design, ML systems, or performance ... The hourly rate for this temporary internship position is $45.00/hour to $60.00/hour. The actual ...

Coursework or project experience with Computer Architecture, RTL Design, ML systems, or performance ... The hourly rate for this temporary internship position is $45.00/hour to $60.00/hour. The actual ...

... RTL implementation (Verilog/VHDL), verification, and system integration across multiple FPGA ... If eligible, the benefits available for this temporary role may include the following: * Medical ...

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Temporary Rtl Verification information

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How much do temporary rtl verification jobs pay per hour?

As of Aug 25, 2026, the average hourly pay for temporary rtl verification in the United States is $18.87, according to ZipRecruiter salary data. Most workers in this role earn between $16.35 and $20.19 per hour, depending on experience, location, and employer.

What cities are hiring for Temporary Rtl Verification jobs?

Cities with the most Temporary Rtl Verification job openings:

What are the most commonly searched types of Rtl Verification jobs?

The most popular types of Rtl Verification jobs are:

What states have the most Temporary Rtl Verification jobs?

States with the most job openings for Temporary Rtl Verification jobs include:

Infographic showing various Temporary Rtl Verification job openings in the United States as of August 2026, with employment types broken down into 1% As Needed, 79% Full Time, 16% Part Time, 3% Contract, and 1% Nights. Highlights an 89% Physical, 3% Hybrid, and 8% Remote job distribution, with an average salary of $39,247 per year, or $18.9 per hour.

Digital Verification Engineer

Socket.dev

South San Francisco, CA • On-site

$131 - $243/hr

Other

Medical, Dental, Vision, Retirement

Posted 6 days ago


Job description

About Neuralink:

We are creating devices that enable a bi-directional interface with the brain. These devices allow us to restore movement to the paralyzed, restore sight to the blind, and revolutionize how humans interact with their digital world.

Job Description & Responsibilities:

We are looking for ASIC Design Verification Engineers with strong CPU, ASIC design and verification fundamentals to work in Neuralink’s System-on-Chip (SoC) department under the Implant Team. This position offers a rare and unique opportunity to have a high impact in realizing state-of-the-art brain-computer interfaces. The team delivers architecture and logic implementation of digital modules with a strong focus in high-throughput low-power digital signal processing (DSP) . We have crafted a team of exceptional engineers whose mission is to push the frontiers of what is possible today and define the future.

Key qualifications:
  • Minimum 3 years of experience in digital ASIC verification.
  • Excellence in SystemVerilog.
  • Experience in developing automation flow and scripts such as Python, Perl, Makefile, Tcl and UNIX shell
  • Experience with code coverage and regression setup.
Preferred qualifications:
  • Experience working on complex digital systems from architecture, microarchitecture, RTL, verification and physical design using industry standard tools.
  • Experience on building test benches, testing, and debugging for a complex system-on-chip.
  • Experience in formal verification.
  • Functional modeling experience and logic verification with SystemVerilog, SystemC/C++.
  • Experience with IEEE-1801 (UPF) based design simulation flows
  • Experience with low power gate level simulations
  • Exposure with low power formal verification flows
  • Strong hands-on experience in verification methodologies such as UVM
  • Knowledge of ARM/RISC-V processor, AMBA bus
  • Knowledge of power aware verification
  • Experience with FPGA/emulation
  • Experience with lab system bring up, writing diagnostic, and lab debugging
Expected Compensation:

The anticipated base salary for this position is expected to be within the following range. Your actual base pay will be determined by your job-related skills, experience, and relevant education or training. We also believe in aligning our employees’ success with the company's long-term growth. As such, in addition to base salary, Neuralink offers equity compensation (in the form of Restricted Stock Units (RSU)) for all full-time employees.

$131,000—$243,000 USD

What We Offer:

Full-time employees are eligible for the following benefits listed below.

  • An opportunity to change the world and work with some of the smartest and most talented experts from different fields
  • Growth potential; we rapidly advance team members who have an outsized impact
  • Excellent medical, dental, and vision insurance through a PPO plan
  • Paid holidays
  • Commuter benefits
  • Meals provided
  • Equity (RSUs) *Temporary Employees & Interns excluded
  • 401(k) plan *Interns initially excluded until they work 1,000 hours
  • Parental leave *Temporary Employees & Interns excluded
  • Flexible time off *Temporary Employees & Interns excluded
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