Digital Verification Engineer
South San Francisco, CA Β· On-site
$131K - $243K/yr
Experience working on complex digital systems from architecture, microarchitecture, RTL ... Temporary Employees & Interns excluded #J-18808-Ljbffr
South San Francisco, CA Β· On-site
$131K - $243K/yr
Experience working on complex digital systems from architecture, microarchitecture, RTL ... Temporary Employees & Interns excluded #J-18808-Ljbffr
South San Francisco, CA Β· On-site
$131K - $243K/yr
Experience working on complex digital systems from architecture, microarchitecture, RTL ... Temporary Employees & Interns excluded #J-18808-Ljbffr
South San Francisco, CA Β· On-site
$131K - $243K/yr
Experience working on complex digital systems from architecture, microarchitecture, RTL ... Temporary Employees & Interns excluded
South San Francisco, CA Β· On-site
$131K - $243K/yr
Experience working on complex digital systems from architecture, microarchitecture, RTL ... Temporary Employees & Interns excluded
South San Francisco, CA Β· On-site
$116K - $233K/yr
Microβarchitecture design and RTL implementation of: * Lowβpower digital signal processors ... Collaboration on silicon bringβup tests with verification engineers Required Qualifications
New
South San Francisco, CA Β· On-site
$116K - $233K/yr
Microβarchitecture design and RTL implementation of: * Lowβpower digital signal processors ... Collaboration on silicon bringβup tests with verification engineers Required Qualifications
New
Austin, TX Β· On-site
$116K - $233K/yr
Micro-architecture design and RTL implementation of: * Low-power digital signal processors * Low ... Collaboration on silicon bring-up tests with verification engineers Required Qualifications:
Austin, TX Β· On-site
$116K - $233K/yr
Micro-architecture design and RTL implementation of: * Low-power digital signal processors * Low ... Collaboration on silicon bring-up tests with verification engineers Required Qualifications:
Austin, TX Β· On-site
$151K - $261K/yr
Micro-architecture design and RTL implementation of: * Low-power digital signal processors * Low ... Collaboration on silicon bringβup tests with verification engineers Required Qualifications
Austin, TX Β· On-site
$151K - $261K/yr
Micro-architecture design and RTL implementation of: * Low-power digital signal processors * Low ... Collaboration on silicon bringβup tests with verification engineers Required Qualifications
Austin, TX Β· On-site
$151K - $261K/yr
Micro-architecture design and RTL implementation of: * Low-power digital signal processors * Low ... Collaboration on silicon bring-up tests with verification engineers Required Qualifications:
Austin, TX Β· On-site
$151K - $261K/yr
Micro-architecture design and RTL implementation of: * Low-power digital signal processors * Low ... Collaboration on silicon bring-up tests with verification engineers Required Qualifications:
South San Francisco, CA Β· On-site
$35/hr
Micro-architecture design and RTL implementation of: * Low-power digital signal processors * Low ... Temporary Employees & Interns excluded
South San Francisco, CA Β· On-site
$35/hr
Micro-architecture design and RTL implementation of: * Low-power digital signal processors * Low ... Temporary Employees & Interns excluded
Burlingame, CA Β· On-site
$45 - $60/hr
Coursework or project experience with Computer Architecture, RTL Design, ML systems, or performance ... The hourly rate for this temporary internship position is $45.00/hour to $60.00/hour. The actual ...
Burlingame, CA Β· On-site
$45 - $60/hr
Coursework or project experience with Computer Architecture, RTL Design, ML systems, or performance ... The hourly rate for this temporary internship position is $45.00/hour to $60.00/hour. The actual ...
San Jose, CA Β· On-site
$159K - $296K/yr
... verification, DRC closure, and test coverage closure from RTL/netlist through post-silicon debug ... Regular or Temporary Regular Similar Jobs AI Statement: Nokia embraces the strategic use of ...
San Jose, CA Β· On-site
$159K - $296K/yr
... verification, DRC closure, and test coverage closure from RTL/netlist through post-silicon debug ... Regular or Temporary Regular Similar Jobs AI Statement: Nokia embraces the strategic use of ...
Seattle, WA Β· On-site
$230K - $322K/yr
A temporary remote work exception is approved while our Bay Area, Austin, and/or San Diego sites ... Execute RTL-to-GDS physical implementation of SoCs for space applications: synthesis, floor ...
Seattle, WA Β· On-site
$230K - $322K/yr
A temporary remote work exception is approved while our Bay Area, Austin, and/or San Diego sites ... Execute RTL-to-GDS physical implementation of SoCs for space applications: synthesis, floor ...
Bodega Bay, CA Β· On-site
$230K - $322K/yr
A temporary remote work exception is approved while our Bay Area, Austin, and/or San Diego sites ... Execute RTL-to-GDS physical implementation of SoCs for space applications: synthesis, floor ...
Bodega Bay, CA Β· On-site
$230K - $322K/yr
A temporary remote work exception is approved while our Bay Area, Austin, and/or San Diego sites ... Execute RTL-to-GDS physical implementation of SoCs for space applications: synthesis, floor ...
San Diego, CA Β· On-site
$230K - $322K/yr
A temporary remote work exception is approved while our Bay Area, Austin, and/or San Diego sites ... Execute RTL-to-GDS physical implementation of SoCs for space applications: synthesis, floor ...
San Diego, CA Β· On-site
$230K - $322K/yr
A temporary remote work exception is approved while our Bay Area, Austin, and/or San Diego sites ... Execute RTL-to-GDS physical implementation of SoCs for space applications: synthesis, floor ...
... verification, and validation test benches * Development of FPGA systems using logic design and RTL ... Thank you for your interest in our temporary position. Please be advised that the selected ...
... verification, and validation test benches * Development of FPGA systems using logic design and RTL ... Thank you for your interest in our temporary position. Please be advised that the selected ...
... verification, and validation test benches * Development of FPGA systems using logic design and RTL ... Thank you for your interest in our temporary position. Please be advised that the selected ...
... verification, and validation test benches * Development of FPGA systems using logic design and RTL ... Thank you for your interest in our temporary position. Please be advised that the selected ...
... verification, and validation test benches * Development of FPGA systems using logic design and RTL ... Thank you for your interest in our temporary position. Please be advised that the selected ...
... verification, and validation test benches * Development of FPGA systems using logic design and RTL ... Thank you for your interest in our temporary position. Please be advised that the selected ...
Austin, TX Β· On-site
$121K - $230K/yr
Implement and verify algorithms in high-level languages and transition them to hardware-friendly ... Temporary Employees & Interns excluded
Austin, TX Β· On-site
$121K - $230K/yr
Implement and verify algorithms in high-level languages and transition them to hardware-friendly ... Temporary Employees & Interns excluded
Austin, TX Β· Hybrid
Contribute to Design Verification by developing assertions, checkers, and test plans; perform ... Individuals with temporary visas such as E, F-1 (including those with OPT or CPT), H-1, H-2, L-1, B ...
Austin, TX Β· Hybrid
Contribute to Design Verification by developing assertions, checkers, and test plans; perform ... Individuals with temporary visas such as E, F-1 (including those with OPT or CPT), H-1, H-2, L-1, B ...
San Francisco, CA Β· On-site
$230K - $322K/yr
It is approved for a temporary remote work exception while specific sites are being developed. Key ... Support the ASIC implementation through preβsilicon verification * Design advanced digital ...
New
San Francisco, CA Β· On-site
$230K - $322K/yr
It is approved for a temporary remote work exception while specific sites are being developed. Key ... Support the ASIC implementation through preβsilicon verification * Design advanced digital ...
New
Austin, TX Β· On-site
$105K - $175K/yr
RTL development (Verilog / SystemVerilog) * Digital signal processing theory and implementation ... Temporary Employees & Interns excluded
Austin, TX Β· On-site
$105K - $175K/yr
RTL development (Verilog / SystemVerilog) * Digital signal processing theory and implementation ... Temporary Employees & Interns excluded
Austin, TX Β· On-site
$105K - $175K/yr
Professional experience in FPGA selection, RTL development, digital signal processing theory and ... Temporary Employees & Interns excluded
Austin, TX Β· On-site
$105K - $175K/yr
Professional experience in FPGA selection, RTL development, digital signal processing theory and ... Temporary Employees & Interns excluded
$12.74 - $13.99
2% of jobs
$13.99 - $15.23
7% of jobs
$16.20 is the 25th percentile. Wages below this are outliers.
$15.23 - $16.48
20% of jobs
$16.48 - $17.72
17% of jobs
The median wage is $17.98 / hr.
$17.72 - $18.97
18% of jobs
$19.88 is the 75th percentile. Wages above this are outliers.
$18.97 - $20.21
15% of jobs
$20.21 - $21.46
9% of jobs
$21.46 - $22.71
5% of jobs
$22.71 - $23.95
4% of jobs
$23.95 - $25.20
2% of jobs
$25.20 - $26.44
0% of jobs
$12
$18
$26
Cities with the most Temporary Rtl Verification job openings:
The most popular types of Rtl Verification jobs are:
States with the most job openings for Temporary Rtl Verification jobs include:
For Temporary Rtl Verification jobs, the most frequently searched job titles are:

South San Francisco, CA β’ On-site
$131K - $243K/yr
Other
Medical, Dental, Vision, Retirement
Posted 27 days ago
We are creating devices that enable a bi-directional interface with the brain. These devices allow us to restore movement to the paralyzed, restore sight to the blind, and revolutionize how humans interact with their digital world.
Job Description & Responsibilities:We are looking for ASIC Design Verification Engineers with strong CPU, ASIC design and verification fundamentals to work in Neuralinkβs System-on-Chip (SoC) department under the Implant Team. This position offers a rare and unique opportunity to have a high impact in realizing state-of-the-art brain-computer interfaces. The team delivers architecture and logic implementation of digital modules with a strong focus in high-throughput low-power digital signal processing (DSP) . We have crafted a team of exceptional engineers whose mission is to push the frontiers of what is possible today and define the future.
Key qualifications:The anticipated base salary for this position is expected to be within the following range. Your actual base pay will be determined by your job-related skills, experience, and relevant education or training. We also believe in aligning our employeesβ success with the company's long-term growth. As such, in addition to base salary, Neuralink offers equity compensation (in the form of Restricted Stock Units (RSU)) for all full-time employees.
$131,000β$243,000 USD
What We Offer:Full-time employees are eligible for the following benefits listed below.
Sourced by ZipRecruiter
Network security
1 - 10 Employees
San Francisco, CA, US