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Entry Level Rtl Verification Jobs (NOW HIRING)

NXP Semiconductors

SOC DFT Intern - Summer 2027

Austin, TX · Hybrid

$14.75 - $19.75/hr

Collaborate with RTL designers and verification teams to ensure testability requirements are met ... If you are graduating prior to July 2027 please apply to Entry Level full-time roles. More ...

NXP Semiconductors

SOC DFT Intern - Spring 2027

Austin, TX · On-site

$14.75 - $19.75/hr

Collaborate with RTL designers and verification teams to ensure testability requirements are met ... If you are graduating prior to May 2027 please apply to Entry Level full-time roles. More ...

Intel

Design Verification Engineer

Santa Clara, CA · On-site

$105K - $149K/yr

About Intel & Silicon Chassis Intel is seeking an Entry Level Design Verification Engineer for the ... reason about RTL is essential Demonstrated algorithmic thinking and software fundamentals ...

Emerson

Hardware Digital Engineer

Austin, TX · Hybrid

Product R&D has an immediate opening for an entry-level Digital Hardware Engineer within our ... Contribute to Design Verification by developing assertions, checkers, and test plans; perform ...

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As of Sep 14, 2026, the average hourly pay for entry level rtl verification in the United States is $20.70, according to ZipRecruiter salary data. Most workers in this role earn between $15.38 and $21.88 per hour, depending on experience, location, and employer.

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Entry Level Rtl Verification jobs near you
Infographic showing various Entry Level Rtl Verification job openings in the United States as of August 2026, with employment types broken down into 1% As Needed, 80% Full Time, 14% Part Time, 4% Contract, and 1% Nights. Highlights an 91% Physical, 2% Hybrid, and 7% Remote job distribution, with an average salary of $43,051 per year, or $20.7 per hour.

SOC DFT Intern - Summer 2027

Austin, TX • Hybrid

NXP Semiconductors
See more jobs at NXP Semiconductorsexternal

$14.75 - $19.75/hr

Full-time

Posted 6 days ago

Job description

Job Description
Job Title:DFT Intern

Location:Austin, TX (On-site/Hybrid)
Department:Digital Design - DFT
Reports To:DFT Engineer / Manager

About the Role:

We are seeking a highly motivated and detail-orientedDesign for Test (DFT) Internto join our Digital Design team. As a DFT Intern, you will work closely with experienced engineers to support the development and implementation of DFT methodologies for cutting-edge SoC designs. This internship offers hands-on experience in scan insertion, ATPG, MBIST, and other test-related flows in a real-world semiconductor environment.

Key Responsibilities:

  • Assist in the implementation of DFT techniques such as scan insertion, boundary scan, and memory BIST.

  • Support ATPG pattern generation and validation using industry-standard tools.

  • Help with test coverage analysis and debug of test patterns.

  • Collaborate with RTL designers and verification teams to ensure testability requirements are met.

  • Contribute to automation of DFT flows using scripting languages (e.g., Python, Perl, TCL).

  • Document DFT methodologies, test plans, and results.

Qualifications:

  • Currently pursuing aBachelor's or Master's degreein Electrical Engineering, Computer Engineering, or a related field.

  • Strong understanding of digital logic design and VLSI fundamentals.

  • Familiarity with Verilog/VHDL and scripting languages (Python, Perl, or TCL).

  • Exposure to DFT concepts such as scan chains, ATPG, and BIST is a plus.

  • Experience with EDA tools from Synopsys, Cadence, or Mentor Graphics is desirable.

  • Excellent problem-solving skills and attention to detail.

  • Strong communication and teamwork abilities.

Preferred Skills (Nice to Have):

  • Coursework or project experience in DFT or digital IC design.

  • Knowledge of STA, synthesis, and RTL verification.

  • Familiarity with Linux/Unix environments.

What You'll Gain:

  • Hands-on experience with industry-standard DFT tools and flows.

  • Mentorship from experienced engineers in a collaborative environment.

  • Exposure to the full ASIC design and test cycle.

  • Opportunity to contribute to real silicon projects.

In order to be considered for a summer internship with NXP you must be returning to school or graduating at the conclusion of the internship term. If you are graduating prior to July 2027 please apply to Entry Level full-time roles.

More information about NXP in the United States...

NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals.

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