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Physical Design Engineer Jobs in California (NOW HIRING)

Physical Design Engineer

San Jose, CA · On-site

$150K - $275K/yr

Job Summary Etched is looking for exceptional Physical Design engineers to join our team. In this role, you will own block-level implementation and verification, drive timing closure and PPA ...

Physical Design Engineer

San Jose, CA · On-site

$159K - $164K/yr

Broadcom is searching for a Physical IC Design Engineer to join the Data Center Solutions Group at our main campus in Colorado Springs, Colorado. This position involves working with the latest ...

Physical Design Engineer

San Jose, CA · On-site

$159K - $164K/yr

Broadcom is searching for a Physical IC Design Engineer to join the Data Center Solutions Group at our main campus in Colorado Springs, Colorado.This position involves working with the latest ...

Physical Design Engineer

San Diego, CA

$144K - $148K/yr

Physical Design Engineer Location : San Diego,CA Type : Full Time Job Overview: To do Floor planning, P&R, timing closure SI prevention/fixing, power planning, CTS, PV and I/R drop for Block as well ...

Physical Design Engineer

San Diego, CA · On-site

$144K - $148K/yr

PHYSICAL DESIGN Engineer Work Location -San Diego , CA Duration: 6+ Months Experience: 8-10Yrs Start Date- Immediate • Floor planning, P&R, timing closure SI prevention/fixing, power planning, CTS ...

Silicon Physical Design Engineer Responsibilities: * Lead physical design implementation across floorplanning, placement, clock tree synthesis, routing, and signoff for complex custom silicon blocks ...

Senior Physical Design Engineer

Sunnyvale, CA · On-site

$161K - $166K/yr

PD Engineer-Onsite (Manager level) Sunnyvale, CA, USA Fulltime We are looking for a Senior Physical Design Engineer with 8-14 years of experience to lead and execute RTL to GDSII implementation for ...

New

Google - Physical Design Engineer, Sunnyvale, CA, USA Required qualifications * Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent ...

Role Overview We are seeking a Senior Physical Design Engineer to join our silicon design team developing high‑performance ASIC using TSMC advance process nodes, including 5nm and 3nm. In this role ...

CPU Physical Design Engineer

Santa Clara, CA · On-site

$159K - $164K/yr

Description As a CPU Physical Design Engineer, you will drive or participate in the following: • Drive RTL-to-GDS design convergence through logic synthesis and place-and-route tools targeting ...

CPU Physical Design Engineer

Santa Clara, CA · On-site

$159K - $164K/yr

Description As a CPU Physical Design Engineer, you will drive or participate in the following: • Drive RTL-to-GDS design convergence through logic synthesis and place-and-route tools targeting ...

Physical Design Engineer

San Jose, CA

$159K - $164K/yr

Physical Design Engineer Location: San Jose, CA Experience: 5- 8 Years Duration: 12 Months Open for W2 candidates - OPT, L2 EAD, GC, Citizen, H1 Transfer * Experience with ICC Route edits through ...

Showing results 41-60

Physical Design Engineer information

See California salary details

$93.8K

$139.6K

How much do physical design engineer jobs pay per year?

As of Aug 10, 2026, the average yearly pay for physical design engineer in California is $137,583.00, according to ZipRecruiter salary data. Most workers in this role earn between $134,200.00 and $138,200.00 per year, depending on experience, location, and employer.

What is a physical design engineer?

A Physical Design Engineer is responsible for transforming logical circuit designs into a physical layout that can be manufactured as an integrated circuit (IC). They focus on key aspects like floor planning, placement, clock tree synthesis (CTS), routing, and timing closure while ensuring power and performance optimization. They work with Electronic Design Automation (EDA) tools and collaborate with front-end designers to meet design specifications. The role requires proficiency in tools such as Cadence, Synopsys, or Mentor Graphics and knowledge of processes like ASIC or SoC design.

What are the key skills and qualifications needed to thrive as a physical design engineer?

To thrive as a Physical Design Engineer, you need a solid background in electrical engineering, experience with ASIC or SoC design methodologies, and a deep understanding of digital circuit fundamentals. Proficiency with EDA tools like Synopsys, Cadence, or Mentor Graphics, as well as familiarity with scripting languages and industry certifications, is highly valued. Attention to detail, effective teamwork, and strong problem-solving skills are essential soft skills for this role. These qualifications are crucial as they enable efficient chip design, ensure successful project delivery, and foster productive collaboration in complex engineering environments.

What are the typical daily responsibilities of a physical design engineer?

As a Physical Design Engineer, your daily responsibilities typically include taking logical circuit designs and translating them into physical layouts, performing floorplanning, placement, and routing of blocks, and conducting timing closure and verification. You will use specialized EDA tools to ensure that designs meet performance, power, and area requirements, collaborating closely with design, verification, and manufacturing teams. The role also involves resolving design issues, optimizing chip layouts, and preparing design data for fabrication. Working in this position provides exposure to advanced technology nodes and the opportunity to contribute directly to the development of cutting-edge semiconductor products.

What are the most commonly searched types of Physical Design Engineer jobs in California? The most popular types of Physical Design Engineer jobs in California are:
What job categories do people searching Physical Design Engineer jobs in California look for? The top searched job categories for Physical Design Engineer jobs in California are:
What cities in California are hiring for Physical Design Engineer jobs? Cities in California with the most Physical Design Engineer job openings:
Infographic showing various Physical Design Engineer job openings in California as of August 2026, with employment types broken down into 1% As Needed, 68% Full Time, 26% Part Time, 3% Temporary, and 2% Contract. Highlights an 97% Physical, 1% Hybrid, and 2% Remote job distribution, with an average salary of $137,583 per year, or $66.1 per hour.

Physical Design Engineer

Etched

San Jose, CA • On-site

$150K - $275K/yr

Full-time

Medical, Dental, Vision

Re-posted 26 days ago


Job description

About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
Etched is looking for exceptional Physical Design engineers to join our team. In this role, you
will own block-level implementation and verification, drive timing closure and PPA optimization, supervise 3rd party design work, and help improve our design flows and iteration speed.
Key Responsibilities
  • Deeply understand what is involved in physical design
  • Running PD flows to close blocks, support ASIC infrastructure, automate PD flows,
    improve CAD infrastructure
  • Collaborate with RTL Designers and provide Physical Design feedback to improve PPA
  • Drive dashboards that show the convergence of projects related to PD
  • Optimize tool flows, working with EDA vendors to incorporate the latest features
  • Accountable for block level closure
  • Supervise the outsourcing of physical design to a 3rd party service

You may be a good fit if you have
  • 5-10+ years of previous experience with PD
  • Tools, flow, and design methodology from RTL synthesis to GDSII sign-off
  • Experience with back-end design and timing closure on advanced process nodes (5nm
    and below)
  • Experience with Cadence (Innovus, Genus) or Synopsys (ICC2, Fusion Compiler)
    automated RTL-to-GDSII flows
  • Experience with sign-off tools (PrimeTime, Tempus, Voltus, etc.)
  • Experience with UPF-based low power design methodology, power verification,synthesis, scan insertion/ATPG, formal verification, floorplanning, placement, CTS,
    routing, IR drop, and EM/antenna analysis
  • Deeply creative and able to think from first principles

Strong candidates may also have experience with
  • Familiarity with modern ML and LLM model architectures
  • Ability to program with Python or another scripting language
  • Familiarity with AI tools for programming/coding
  • Startup experience or comfort working in fast-paced environments

Benefits
  • Medical, dental, and vision packages with generous premium coverage
    • $500 per month credit for waiving medical benefits
  • Housing subsidy of $2k per month for those living within walking distance of the office
  • Relocation support for those moving to San Jose (Santana Row)
  • Various wellness benefits covering fitness, mental health, and more
  • Daily lunch + dinner in our office
  • Unlimited compute budget subject to ROI justification

How we're different:
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.