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Remote Physical Design Manager Jobs in California

ASIC/SOC CAD Engineer

Mountain View, CA ยท On-site +1

$175K - $362K/yr

... Physical Design and/or CAD * Experience with EDA license management, LSF and equivalent job ... Remote Perks We work remotely Monday & Friday, supported by home-tech setup, and remote wifi ...

Substation Physical Engineer - REMOTE

Riverside, CA ยท Remote

$102K - $130K/yr

Substation Physical Engineer - REMOTE Location: Remote US Ready to make a difference? ICF is ... design standards and practices (IEEE, NESC, utility specs) * Ability to manage multiple projects ...

Senior Workplace Design Manager

Santa Clara, CA ยท On-site +1

$116K - $159K/yr

This will range from participating as an active member of the onsite project team, to remote participation, to hiring a third party as an owner's representative. The Senior Workplace Design Manager ...

Substation Physical Engineer - REMOTE

Los Angeles, CA ยท Remote

$106K - $135K/yr

Substation Physical Engineer - REMOTE Location: Remote US Ready to make a difference? ICF is ... design standards and practices (IEEE, NESC, utility specs) * Ability to manage multiple projects ...

Substation Physical Engineer - REMOTE

Bakersfield, CA ยท Remote

$101K - $129K/yr

Substation Physical Engineer - REMOTE Location: Remote US Ready to make a difference? ICF is ... design standards and practices (IEEE, NESC, utility specs) * Ability to manage multiple projects ...

Substation Physical Engineer - REMOTE

San Luis Obispo, CA ยท Remote

$106K - $135K/yr

Substation Physical Engineer - REMOTE Location: Remote US Ready to make a difference? ICF is ... design standards and practices (IEEE, NESC, utility specs) * Ability to manage multiple projects ...

Lead Substation Physical Engineer - REMOTE

Los Angeles, CA ยท On-site +1

$110K - $145K/yr

ICF is seeking an experienced Substation Physical Engineer to lead the design and execution of high ... Ability to manage multiple projects and mentor junior staff * Strong initiative and leadership ...

Substation Design Manager

Fresno, CA ยท On-site +1

$160K - $210K/yr

Coordinate physical layout, grounding, raceway, steel/foundations, bus, equipment ratings ... Support the field with RFIs, NCRs, design clarifications, and redlines; manage change control and ...

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Remote Physical Design Manager information

Does Amazon have VLSI jobs?

Amazon offers VLSI (Very Large Scale Integration) design and engineering roles, particularly within its hardware and semiconductor divisions. These positions typically require expertise in digital design, verification, and tools like Cadence or Synopsys, and may involve working on chip design for Amazon devices or infrastructure. Candidates should review Amazon's careers page for current VLSI-related openings and specific job requirements.

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A Remote Physical Design Manager typically earns a high salary compared to many other engineering roles, with compensation often reflecting experience, industry demand, and company size. These positions usually require advanced skills in digital design, EDA tools, and project management, which contribute to higher pay levels.

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Physical Design Engineer

Physical Design Engineer

Central Business Solutions

San Jose, CA โ€ข On-site, Remote

$159K - $164K/yr

Full-time

Posted 3 days ago


Job description

Title: Physical Design Engineer
Location: 100% Remote
Duration: Long Term Contract role

Responsibilities
  • Develop and own physical design implementation of multi-hierarchy low-power designs including physical-aware logic synthesis, design for testability, floorplan, place and route, static timing analysis, IR Drop, EM, and physical verification in advanced technology nodes.
  • Resolve design and flow issues related to physical design, identify potential solutions, and drive execution
  • Deliver physical design of an end-to-end IP or integration of ASIC/SoC design

Minimum Qualifications:
  • Bachelor's degree in Electrical Engineering, with 5 years of relevant physical design experience
  • Strong understanding in the RTL2GDSII flow and design tapeouts in 16nm/14nm or below process technologies
  • Experience with low power implementation, power gating, multiple voltage rails, strong UPF/CPF knowledge.
  • Experience working with most EDA tools like DC/Genus, ICC2/Innovus, Primetime, Redhawk/Voltus, Calibre.

Preferred Qualification:
  • Experience in running physical-aware logic synthesis and achieving optimal synthesis QoR on low power designs
  • Knowledge of static timing analysis and concepts, defining timing constraints and exceptions, corners/voltage definitions.
  • Experience in Block-level and Full-chip floor-planning, power grid planning
  • Experience with custom or regular clock tree synthesis implementation at block level or top level, and clock power reduction techniques.
  • Experience with Python, TCL, Perl programming.