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Remote Physical Design Manager Jobs (NOW HIRING)

JM Hunter Group

Remote Truss Design Manager

Burleson, TX · Remote

$1.1K - $1.5K/wk

We are looking for an experienced Remote Truss Design Manager to lead a team of 10 truss designers from a remote location. In this role, you will oversee the design process, manage a team of ...

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Does Amazon have VLSI jobs?

Amazon offers VLSI (Very Large Scale Integration) design and engineering roles, particularly within its hardware and semiconductor divisions. These positions typically require expertise in digital design, verification, and tools like Cadence or Synopsys, and may involve working on chip design for Amazon devices or infrastructure. Candidates should review Amazon's careers page for current VLSI-related openings and specific job requirements.

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A Remote Physical Design Manager typically earns a high salary compared to many other engineering roles, with compensation often reflecting experience, industry demand, and company size. These positions usually require advanced skills in digital design, EDA tools, and project management, which contribute to higher pay levels.

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Remote Physical Design Manager jobs near you
Infographic showing various Remote Physical Design Manager job openings in the United States as of July 2026, with employment types broken down into 88% Full Time, 9% Part Time, and 3% Contract. Highlights an 85% Physical, 4% Hybrid, and 11% Remote job distribution.
Physical Design Engineer

Physical Design Engineer

Central Business Solutions

San Jose, CA • On-site, Remote

$159K - $164K/yr

Full-time

Re-posted 29 days ago

Job description

Title: Physical Design Engineer
Location: 100% Remote
Duration: Long Term Contract role
Responsibilities
  • Develop and own physical design implementation of multi-hierarchy low-power designs including physical-aware logic synthesis, design for testability, floorplan, place and route, static timing analysis, IR Drop, EM, and physical verification in advanced technology nodes.
  • Resolve design and flow issues related to physical design, identify potential solutions, and drive execution
  • Deliver physical design of an end-to-end IP or integration of ASIC/SoC design

Minimum Qualifications:
  • Bachelor's degree in Electrical Engineering, with 5 years of relevant physical design experience
  • Strong understanding in the RTL2GDSII flow and design tapeouts in 16nm/14nm or below process technologies
  • Experience with low power implementation, power gating, multiple voltage rails, strong UPF/CPF knowledge.
  • Experience working with most EDA tools like DC/Genus, ICC2/Innovus, Primetime, Redhawk/Voltus, Calibre.

Preferred Qualification:
  • Experience in running physical-aware logic synthesis and achieving optimal synthesis QoR on low power designs
  • Knowledge of static timing analysis and concepts, defining timing constraints and exceptions, corners/voltage definitions.
  • Experience in Block-level and Full-chip floor-planning, power grid planning
  • Experience with custom or regular clock tree synthesis implementation at block level or top level, and clock power reduction techniques.
  • Experience with Python, TCL, Perl programming.

Apply