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Physical Design Engineer Intern Jobs (NOW HIRING)

Apple

Physical Design Engineer

San Francisco, CA · On-site

$160.20K - $164.90K/yr

We have an opportunity for a forward-thinking and unusually hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the rare and great opportunity to craft upcoming ...

Apple

Physical Design Engineer

San Francisco, CA · On-site

$160.20K - $164.90K/yr

We have an opportunity for a forward-thinking and unusually hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the rare and great opportunity to craft upcoming ...

Baya Systems

Physical Design Engineer

Santa Clara, CA · On-site

$159.70K - $164.40K/yr

Physical Design Engineer Location: Santa Clara, CA About the role: We are seeking a seasoned Physical Design Engineer with a strong background in all aspects of Physical Design and Implementation ...

Apple

Physical Design Engineer

San Francisco, CA · On-site

$160.20K - $164.90K/yr

We have an opportunity for a forward-thinking and unusually hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the rare and great opportunity to craft upcoming ...

Ambarella

$140K - $156K/yr

The Physical Design Engineer willbe an integral part of the physical design team with all aspects of physical design implementation and verification tasks for Ambarella's cutting edgelow powerAISoC ...

iFlow Inc

Physical Design Engineer

Sunnyvale, CA · On-site

$159.60K - $164.30K/yr

Physical Design Engineer Location:Sunnyvale, CA OR Austin,TX Duration: Long term experience: 5-18 years only ( No 18+ years profile) Job Overview: We are looking for a highly skilled Physical Design ...

New

Apple

Physical Design Engineer

Cupertino, CA

$126.80K - $220.90K/yr

Description As a Physical Design engineer you will contribute to all phases of physical design of high performance PHY design from RTL to delivery of our final GDSII.","responsibilities":"Generate ...

Tanisha Systems, Inc.

Physical Design Engineer

Austin, TX

$134.80K - $138.70K/yr

Physical Design Engineer Sunnyvale CA or Austin TX- Onsite Fulltime / FTE Salary: Market- Negotiable Job Overview: We are looking for a highly skilled Physical Design Engineer to work at block level ...

Apple

Physical Design Engineer

Cupertino, CA

$181.10K - $318.40K/yr

Description As a Physical Design engineer you will contribute to all phases of physical design of high performance PHY design from RTL to delivery of our final GDSII. Your responsibilities include ...

Futran Tech Solutions Pvt. Ltd.

Physical Design Engineer

$139.20K - $143.30K/yr

Overall, 7 to 12 yrs of exp as a Physical Design Engineer. (Remote Opening) Must Have : Advance Node Exp 3nm/5nm,Full Chip Integration, Advance/Complex SOC Integration, Cadence/Synopsys (Innovus ...

Apple

Physical Design Engineer

Bodega Bay, CA

$147.40K - $272.10K/yr

Description As a Physical Design engineer you will contribute to all phases of physical design of high performance PHY design from RTL to delivery of our final GDSII. Your responsibilities include ...

Etched

Physical Design Engineer

Cupertino, CA · On-site

$2K/mo

Physical Design Engineer Etched is looking for exceptional PD engineers to join our team. The candidate will be responsible for working with 3rd party design services to implement and verify physical ...

Etched

Physical Design Engineer

Cupertino, CA

$2K/mo

Physical Design Engineer Etched is looking for exceptional PD engineers to join our team. The candidate will be responsible for working with 3rd party design services to implement and verify physical ...

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Physical Design Engineer Intern information

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How much do physical design engineer intern jobs pay per hour?

As of May 31, 2026, the average hourly pay for physical design engineer intern in the United States is $19.31, according to ZipRecruiter salary data. Most workers in this role earn between $16.11 and $20.91 per hour, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as a Physical Design Engineer Intern, and why are they important?

To thrive as a Physical Design Engineer Intern, you generally need a solid background in electrical engineering, digital circuit design, and semiconductor fundamentals, often supported by ongoing university studies in a related field. Familiarity with industry-standard EDA tools such as Cadence, Synopsys, or Mentor Graphics, as well as scripting languages like TCL or Python, is highly valuable. Attention to detail, problem-solving abilities, and effective teamwork are crucial soft skills for excelling in this role. These skills and qualifications are important because they ensure accurate chip layouts, efficient workflows, and successful collaboration within complex engineering teams.

What types of projects and tasks can a Physical Design Engineer Intern expect to work on during their internship?

As a Physical Design Engineer Intern, you will typically be involved in supporting the design and verification of integrated circuits at the physical level. Common tasks include assisting with floorplanning, placement and routing, timing analysis, and running design rule checks using industry-standard EDA tools. You may also participate in team meetings, collaborate with senior engineers, and help resolve issues related to power, performance, and area optimization. These hands-on experiences are designed to help you build practical skills and gain a deeper understanding of the physical design flow in VLSI chip development.

What does a Physical Design Engineer Intern do?

A Physical Design Engineer Intern assists in the process of transforming a circuit design (RTL) into a real, manufacturable layout for semiconductor chips. They work on tasks such as floorplanning, placement, routing, timing analysis, and verifying that the chip design meets all physical and electrical requirements. Interns typically use electronic design automation (EDA) tools to perform these tasks and collaborate with experienced engineers. Their work is crucial in ensuring that chips are both functional and manufacturable at scale.

What is the difference between Physical Design Engineer Intern vs Digital Design Engineer Intern?

AspectPhysical Design Engineer InternDigital Design Engineer Intern
Required CredentialsTypically pursuing or holding a degree in Electrical Engineering or Computer EngineeringTypically pursuing or holding a degree in Electrical Engineering or Computer Engineering
Work EnvironmentDesigning and implementing physical chip layouts, working with EDA toolsDesigning digital logic circuits, working on HDL coding and simulation
Industry UsageFoundries, semiconductor companies, integrated circuit design firmsSemiconductor companies, integrated circuit design firms, tech companies

Physical Design Engineer Interns focus on translating digital logic designs into physical layouts for chips, working closely with EDA tools. Digital Design Engineer Interns concentrate on creating and simulating digital logic circuits using hardware description languages. Both roles are essential in chip development but differ in their specific tasks and focus areas.

More about Physical Design Engineer Intern jobs
What cities are hiring for Physical Design Engineer Intern jobs? Cities with the most Physical Design Engineer Intern job openings:
What are the most commonly searched types of Physical Design Engineer jobs? The most popular types of Physical Design Engineer jobs are:
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Physical Design Engineer Intern jobs near you
Infographic showing various Physical Design Engineer Intern job openings in the United States as of May 2026, with employment types broken down into 94% Full Time, 4% Part Time, and 2% Contract. Highlights an 95% Physical, 1% Hybrid, and 4% Remote job distribution, with an average salary of $40,174 per year, or $19.3 per hour.

Physical Design Engineer

WinMax Systems Corporation

San Jose, CA

$159.40K - $164.10K/yr

Contractor

Posted 17 days ago

Job description

Job Description

Job Title: Physical Design Engineer

Duties: We're seeking an experienced physical design engineer in the development of high-performance, low-power GPU top level design. Successful candidates are responsible for all aspects of physical design and implementation of Graphics processors. Responsibilities include participating in the efforts in establishing CAD and physical design methodologies (flow and tools development), chip floor plan, power/clock distribution, chip assembly and P&R, timing closure, power and noise analysis and back-end verification.

The qualified candidate will possess the following:

Candidates will be required to be familiar with industry CAD methodologies and guidelines using primarily Synopsys EDA tools for design and timing closure.

Hands on experience with Synopsys ICCII, PrimeTime, Design Compiler, MRV, Cadence Conformal.

Understanding of hardware description language such as SystemVerilog is a plus.

Candidate should possess a strong understanding of static timing analysis, clock/power distribution and analysis, RC Extraction and correlation, place and route, circuit design and analysis. Hands on experience on timing closure.

Scripting and programming experience using several of the following: Perl, C, C++, TCL, Scheme, Skill, and Make is a plus.

Good written/verbal communication skills, strong team work Motivated, self-directed and able to work effectively, both independently and in a team.

Education: Educational Degree: BS + CS/EE or relevant field

Min. years overall: 7+ years of industrial experience after BS/MS degree.

Additional Information

All your information will be kept confidential according to EEO guidelines.

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