As a Digital IC Design Engineer Intern, your responsibilities will include: * Micro-architecture design and RTL implementation of: * Low-power digital signal processors * Low-power general-purpose ...
As a Digital IC Design Engineer Intern, your responsibilities will include: * Micro-architecture design and RTL implementation of: * Low-power digital signal processors * Low-power general-purpose ...
Digital IC Design Engineer Intern
Fremont, CA · On-site
$35/hr
As a Digital IC Design Engineer Intern, your responsibilities will include: * Micro-architecture design and RTL implementation of: * Low-power digital signal processors * Low-power general-purpose ...
Digital IC Design Engineer Intern
Fremont, CA · On-site
$35/hr
As a Digital IC Design Engineer Intern, your responsibilities will include: * Micro-architecture design and RTL implementation of: * Low-power digital signal processors * Low-power general-purpose ...
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Principal Digital Design Engineer About the Role As a Principal Digital Design Engineer, you will drive technical strategy and innovation for complex digital systems, including System on Chips (SoCs)
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Somerset, NJ · On-site
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Principal Digital Design Engineer About the Role As a Principal Digital Design Engineer, you will drive technical strategy and innovation for complex digital systems, including System on Chips (SoCs)
Digital Design Engineer
Somerset, NJ · On-site
$143.70K/yr
Principal Digital Design Engineer About the Role As a Principal Digital Design Engineer, you will drive technical strategy and innovation for complex digital systems, including System on Chips (SoCs)
Digital Design Engineer
$143.70K/yr
Principal Digital Design Engineer About the Role As a Principal Digital Design Engineer, you will drive technical strategy and innovation for complex digital systems, including System on Chips (SoCs)
Digital Design Engineer
$143.70K/yr
Principal Digital Design Engineer About the Role As a Principal Digital Design Engineer, you will drive technical strategy and innovation for complex digital systems, including System on Chips (SoCs)
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Digital Design Engineer Job Location: Santa Clara, CA (Onsite for 5 days a week) Job Type: Long-term contract Duration: 12 months Minimum Qualifications * The ideal candidate should have MS in ...
Quick apply
Digital Design Engineer
Santa Clara, CA · On-site
$159.70K/yr
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$136.85K - $185.15K/yr
Digital Design Engineer Company: The Boeing Company Boeing Defense, Space & Security (BDS) seeks a Digital Design Engineer to join our team in Huntsville, AL. Position Responsibilities : * Design ...
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Digital Design Engineer. Location : REMOTE Duration : 6+ Months on W2 Visa : Independent candidates who are eligible to work for any employer, like Green Card / US Citizen, as client is not willing ...
We are seeking an experienced Digital Design Engineer to work as part of a multi-disciplinary engineering teamthroughout the life cycle of a program.In this role, you will execute on complex ...
We are seeking an experienced Digital Design Engineer to work as part of a multi-disciplinary engineering teamthroughout the life cycle of a program.In this role, you will execute on complex ...
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Huntsville, AL · On-site
$136.85K - $185.15K/yr
Digital Design Engineer Company: The Boeing Company Boeing Defense, Space & Security (BDS) seeks a Digital Design Engineer to join our team in Huntsville, AL. Position Responsibilities : * Design ...
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$136.85K - $185.15K/yr
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We are seeking an experienced Digital Design Engineer to work as part of a multi-disciplinary engineering team throughout the life cycle of a program. In this role, you will execute on complex ...
Digital Design Engineer
Huntsville, AL · On-site
$134K/yr
We are seeking an experienced Digital Design Engineer to work as part of a multi-disciplinary engineering team throughout the life cycle of a program. In this role, you will execute on complex ...
Digital Design Engineer
$136.85K - $185.15K/yr
Digital Design Engineer Company: The Boeing Company Boeing Defense, Space & Security (BDS) seeks a Digital Design Engineer to join our team in Huntsville, AL. Position Responsibilities : * Design ...
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$136.85K - $185.15K/yr
Digital Design Engineer Company: The Boeing Company Boeing Defense, Space & Security (BDS) seeks a Digital Design Engineer to join our team in Huntsville, AL. Position Responsibilities : * Design ...
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Digital Design Engineer - Secret Clearance Required Location: Tucson, AZ (On-site) Job Type: W-2 Contract or Contract to hire Clearance: Active U.S. Security Clearance required prior to start Pay ...
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PROLIM (www.prolim.com) is currently seeking Digital Design Engineer 3 for one of our top Client for Location: San Diego, CA Qualified candidates can directly send your updated resume and contact ...
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Digital Design Engineer 3
San Diego, CA · On-site
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Lead, Digital Design Engineer Job Code: 38427 Job Location: Londonderry, NH Job Schedule: 9/80; Employees work 9 out of every 14 days - totaling 80 hours worked - and have every other Friday off ...
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Digital Design Engineer Intern information
See salary details
$9.13 - $11.65
9% of jobs
$11.65 - $14.16
8% of jobs
$14.81 is the 25th percentile. Wages below this are outliers.
$14.16 - $16.67
28% of jobs
The median wage is $17.34 / hr.
$16.67 - $19.19
16% of jobs
$20.91 is the 75th percentile. Wages above this are outliers.
$19.19 - $21.70
20% of jobs
$21.70 - $24.21
9% of jobs
$24.21 - $26.73
4% of jobs
$26.73 - $29.24
1% of jobs
$29.24 - $31.75
1% of jobs
$31.75 - $34.27
1% of jobs
$34.27 - $36.78
2% of jobs
$9
$19
$36
How much do digital design engineer intern jobs pay per hour?
What are the key skills and qualifications needed to thrive as a Digital Design Engineer Intern, and why are they important?
What types of projects and responsibilities can a Digital Design Engineer Intern typically expect during their internship?
What does a Digital Design Engineer Intern do?
What is the difference between Digital Design Engineer Intern vs Digital IC Design Engineer?
| Aspect | Digital Design Engineer Intern | Digital IC Design Engineer |
|---|---|---|
| Required Credentials | Enrolled in or recent graduate of Electrical Engineering or Computer Engineering | Bachelor's or Master's in Electrical Engineering, Computer Engineering, or related field |
| Work Environment | Internship, often in a corporate or research lab setting | Full-time professional role, often in semiconductor or electronics companies |
| Employer & Industry Usage | Used in tech companies, startups, and research institutions for entry-level roles | Used in semiconductor, electronics, and integrated circuit design companies |
The Digital Design Engineer Intern typically is a student or recent graduate gaining hands-on experience, while the Digital IC Design Engineer is a full-time professional responsible for designing integrated circuits. Both roles require knowledge of digital logic, hardware description languages, and circuit design, but differ mainly in experience level and job responsibilities.

Job description
Team Description:
The Brain Interfaces Soc Department delivers chip architecture and silicon implementation of neural recording and stimulation system-on-chip (SoC) for high-bandwidth brain-computer interfaces. We have crafted a team of exceptional engineers whose mission is to push the frontiers of what is possible today and define the future.
Job Description and Responsibilities:
We are looking for experienced and hands-on engineers with a creative and initiative mindset, who are interested in exploring the next-generation chip design with advanced architectures and hardware accelerators with a goal of enhancing the energy efficiency, information entropy, and scalability of our wireless brain-computer interfaces towards the physical limit of silicon technology. The ideal candidates are energetic people who get excited about building things, are highly analytical, and enjoy tackling new problems. You will have the opportunity to collaborate closely with chip designers, electrical engineers, algorithms engineers, and software engineers on a small, agile team. As a Digital IC Design Engineer Intern, your responsibilities will include:
- Micro-architecture design and RTL implementation of:Â
- Low-power digital signal processors
- Low-power general-purpose hardware accelerators
- Low-power graphics processing units
- Low-power radio MAC/PHY
- Low-power serial link MAC/PHY
- Design and implementation of hardware/software interface with firmware engineers
- Application-specific architecture optimization including:
- Complex system modeling for energy and performance benchmarks
- Workload analysis and modeling
- Leveraging architecture-level design trade-offs with process technology and workload type
- Balancing energy efficiency and performance under manufacturing process variationÂ
- Complex system-on-chip verification
- Behavioral level modeling and model equivalence check
- FPGA emulation
- Analog mixed-signal co-simulation
- Design for testabilityÂ
- Collaboration on silicon bring-up tests with silicon validation engineersÂ
Required Qualifications:
- Evidence of exceptional ability in electrical engineering, computer science, or computer engineering
- 2+ years of experience in digital design
- Proficient in SystemVerilog, C/C++, Python
- Experience working on complex digital systems from architecture, microarchitecture, and RTL, using industry standard tools
- Experience in designing digital signal processing pipelines, from algorithm to RTL
Preferred Qualifications:
- Experience in architecture optimization with process technology customization
- Experience in the verification of complex digital systems, using industry standard tools
- Experience in the physical design of complex digital systems, using industry standard tools
- Experience testing and debugging digital system-on-a-chips
- Functional modeling experience and logic verification with SystemVerilog, SystemC/C++, or UVMÂ
- Experience automating tool flows
- Experience with embedded design
- Experience in processor instruction set architecture design
- Experience in compiler back-end design and customization
- Experience designing PCBs or writing firmware.
Expected Compensation:
The anticipated hourly rate for this position is listed below.
California Hourly Flat Rate:
$35/Hr USD
About NEURALINK
Sourced by ZipRecruiter
Industry
Biotechnology research and development
Company size
201 - 500 Employees
Headquarters location
San Francisco, CA, US
Year founded
2016