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Digital Design Engineer Intern Jobs in Seattle, WA

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Digital Design Engineer Intern information

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How much do digital design engineer intern jobs pay per hour?

As of May 28, 2026, the average hourly pay for digital design engineer intern in Seattle, WA is $22.05, according to ZipRecruiter salary data. Most workers in this role earn between $16.39 and $24.62 per hour, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as a Digital Design Engineer Intern, and why are they important?

To thrive as a Digital Design Engineer Intern, you need a solid understanding of digital logic design, familiarity with hardware description languages (such as Verilog or VHDL), and progress toward a degree in electrical or computer engineering. Proficiency in simulation tools like ModelSim, FPGA development environments, and PCB design software is typically required. Strong problem-solving skills, attention to detail, and effective teamwork and communication abilities help interns excel in collaborative project settings. These skills and qualities are crucial for designing, testing, and implementing reliable digital systems while contributing effectively to engineering teams.

What types of projects and responsibilities can a Digital Design Engineer Intern typically expect during their internship?

As a Digital Design Engineer Intern, you can expect to work on a variety of tasks such as assisting with the design and verification of digital circuits, creating testbenches using hardware description languages (like Verilog or VHDL), and collaborating with senior engineers on simulation and debugging. Your day-to-day may involve participating in design reviews, documenting your work, and learning how to use industry-standard EDA tools. It's common to work closely with both hardware and software teams, providing a great opportunity to develop technical and teamwork skills while contributing to meaningful projects.

What does a Digital Design Engineer Intern do?

A Digital Design Engineer Intern assists in designing, testing, and validating digital circuits and systems, often using hardware description languages like VHDL or Verilog. They work under the supervision of experienced engineers to develop, simulate, and debug digital components such as processors, memory units, or communication interfaces. Responsibilities may also include documenting designs, running test benches, and collaborating with teams to implement digital solutions. This internship helps students gain practical experience in digital electronics and design methodologies.

What is the difference between Digital Design Engineer Intern vs Digital IC Design Engineer?

AspectDigital Design Engineer InternDigital IC Design Engineer
Required CredentialsEnrolled in or recent graduate of Electrical Engineering or Computer EngineeringBachelor's or Master's in Electrical Engineering, Computer Engineering, or related field
Work EnvironmentInternship, often in a corporate or research lab settingFull-time professional role, often in semiconductor or electronics companies
Employer & Industry UsageUsed in tech companies, startups, and research institutions for entry-level rolesUsed in semiconductor, electronics, and integrated circuit design companies

The Digital Design Engineer Intern typically is a student or recent graduate gaining hands-on experience, while the Digital IC Design Engineer is a full-time professional responsible for designing integrated circuits. Both roles require knowledge of digital logic, hardware description languages, and circuit design, but differ mainly in experience level and job responsibilities.

What job categories do people searching Digital Design Engineer Intern jobs in Seattle, WA look for? The top searched job categories for Digital Design Engineer Intern jobs in Seattle, WA are:
What cities near Seattle, WA are hiring for Digital Design Engineer Intern jobs? Cities near Seattle, WA with the most Digital Design Engineer Intern job openings:
Infographic showing various Digital Design Engineer Intern job openings in Seattle, WA as of May 2026, with employment types broken down into 60% Full Time, and 40% Part Time. Highlights an 100% In-person job distribution, with an average salary of $45,868 per year, or $22.1 per hour.
Principal Digital Design Engineer, Reader IC

Principal Digital Design Engineer, Reader IC

Impinj

Seattle, WA โ€ข On-site

$158.70K - $277.60K/yr

Other

Medical, Retirement

Posted yesterday


Job description

Team Overview

We are looking for a Senior Staff OR Principal Digital Design Engineer to join the Impinj RAIN RFID Reader IC Engineering team to own the microarchitecture definition and front-end implementation of key subsystems for Impinj's next generation of Reader ICs. In this position, you will use your experience in SoC subsystem definition, IP block microarchitecture, digital design and design for tests to take Impinj's next generation of Reader ICs from concept through to production.

What You'll Do
  • Own microarchitecture definition and subsystem development for key IP blocks of Impinj's next-generation RAIN RFID Reader ICs, from concept through implementation, silicon characterization, and high-volume production.
  • Collaborate with Product Management and Systems Engineering to define innovative features and performance targets that extend Impinj's leadership in the Reader IC market.
  • Drive adoption of state-of-the-art SoC integration tools, flows, and methodologies, partnering with the CAD team to significantly advance design environments and ensure production-quality A0 tape-out.
  • Serve as the SoC DFX authority, overseeing scan insertion, ATPG execution, and fault coverage review in close partnership with product test engineering.
  • Evaluate and integrate third-party IP - including Ethernet, USB, and DDR4/DDR5 controllers - ensuring seamless SoC integration and timing convergence.
  • Oversee subsystem definition, design, and implementation to deliver an industry-leading RAIN RFID Reader IC on time and at high quality.
  • Coordinate across disciplines to define priorities, align workflows, and remove execution barriers.
  • Mentor senior and staff engineers, setting technical direction and raising the bar on design quality and methodology across the organization.
What You'll Bring
  • Bachelor's degree in Computer Engineering, with 15 years of experience (or 12 years with MS or 8 years with a PhD) required.
  • 15+ years defining and implementing SoC IP micro-architectures; consistently 15+ years defining and implementing SoC IP micro-architectures; consistently delivering modular, parameterized subsystems optimized for scalability and SoC integration.
  • Proven track record leading multiple complex mixed-signal IPs from concept to first-time-right tape-out and production.
  • Deep expertise in SoC design and integration methodologies: low-power and multi-voltage domain design (UPF), DFT (scan insertion, ATPG, fault grading), register map creation and integration, timing constraint generation, CDC, and synthesis timing convergence.
  • Strong knowledge of microcontroller and system bus architectures, including ARM cores and AMBA protocols, with understanding of key performance metrics.
  • Expertise translating protocol specifications, functional descriptions, and feature requirements into micro-architecture and RTL implementation in Verilog/SystemVerilog.
  • Demonstrated technical leadership with broad organizational impact - able to influence architecture decisions, drive cross-functional alignment, and deliver results through others.
  • Exceptional written and verbal communication skills, with the ability to present complex technical tradeoffs clearly to both engineering and product audiences.
Compensation & Benefits:

The benefits listed below may vary depending on the nature of your employment with Impinj and the country where you work.

The typical base pay range for this role across the US isย $158,700- $277,600. Individual base pay depends on various factors such as complexity and responsibility of role, job duties, requirements, and relevant experience and skills. Both market wage data and the mid-point of the pay range is reviewed and used as the starting point for all new hire offers. Offers are made within the base pay range applicable at the time.
At Impinj certain roles are eligible for additional rewards, including merit increases, annual bonus and stock. These awards are allocated based on individual performance. In addition, certain roles also have the opportunity to earn sales incentives based on revenue or utilization, depending on the terms of the plan and the employee's role. US based employees have access to healthcare benefits; a 401(k) plan and company match among others.

For a more comprehensive list of US employment benefits, clickย here.ย 

US Export Controls:

This position has access to technologies or data subject to U.S. export control regulations. Under these laws, the release or transfer of export-controlled items or information to individuals who are not classified as "U.S. persons" (as defined by Immigration & Nationality Act) may require prior authorization from the U.S. government. We may require additional documentation related to national identity to determine whether an export compliance license is required for any export-controlled items. This information is requested solely for the purpose of complying with U.S. export control laws and will not be used for other purposes. Learn more about export compliance here.