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Physical Design Engineer Internship Jobs (NOW HIRING)

Fractile

Physical Design Engineer

Bristol, VA · On-site

$80 - $120/hr

As a Physical Design Engineer, you will support the implementation of complex IC physical designs ... internships. * Familiarity with EDA tools for place & route, STA, and sign‑off. * Basic ...

search-tactics

Physical Design Engineer

San Jose, CA · On-site

$70 - $80/hr

Physical Design Engineer Location: San Jose, CA Hybrid Duration: 12 Months VISA: H-1, GC, USC is okay C2C Position Overview We are seeking an experienced Physical Design Engineer to support the ...

Search Tactics LLC

Physical Design Engineer

San Jose, CA · On-site

$159K - $164K/yr

Position: Physical Design Engineer Location: San Jose, CA Hybrid Duration: 12 Months VISA: H-1, USC Position Overview We are seeking an experienced Physical Design Engineer to support the ...

Apple

Physical Design Engineer

Cupertino, CA · On-site

$167K - $172K/yr

We have an opportunity for a forward-thinking and unusually hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the rare and great opportunity to craft upcoming ...

Apple

Physical Design Engineer

Beaverton, OR · On-site

$141K - $145K/yr

We have an opportunity for a forward-thinking and unusually hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the rare and great opportunity to craft upcoming ...

Apple

Physical Design Engineer

Cupertino, CA · On-site

$167K - $172K/yr

We have an opportunity for a forward-thinking and unusually hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the rare and great opportunity to craft upcoming ...

Apple

Physical Design Engineer

San Francisco, CA · On-site

$160K - $164K/yr

We have an opportunity for a forward-thinking and unusually hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the rare and great opportunity to craft upcoming ...

Apple

Physical Design Engineer

Cupertino, CA · On-site

$167K - $172K/yr

We have an opportunity for a forward-thinking and unusually hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the rare and great opportunity to craft upcoming ...

Apple

Physical Design Engineer

Beaverton, OR · On-site

$141K - $145K/yr

We have an opportunity for a forward-thinking and unusually hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the rare and great opportunity to craft upcoming ...

Apple

Physical Design Engineer

Cupertino, CA · On-site

$167K - $172K/yr

We have an opportunity for a forward-thinking and unusually hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the rare and great opportunity to craft upcoming ...

Apple

Physical Design Engineer

Beaverton, OR

$141K - $145K/yr

We have an opportunity for a forward-thinking and unusually hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the rare and great opportunity to craft upcoming ...

Apple

Physical Design Engineer

San Francisco, CA · On-site

$160K - $164K/yr

We have an opportunity for a forward-thinking and unusually hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the rare and great opportunity to craft upcoming ...

Apple

Physical Design Engineer

San Francisco, CA · On-site

$160K - $164K/yr

We have an opportunity for a forward-thinking and unusually hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the rare and great opportunity to craft upcoming ...

Apple

Physical Design Engineer

Cupertino, CA · On-site

$167K - $172K/yr

We have an opportunity for a forward-thinking and unusually hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the rare and great opportunity to craft upcoming ...

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Physical Design Engineer Internship information

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$95K

$141.5K

How much do physical design engineer internship jobs pay per year?

As of Aug 18, 2026, the average yearly pay for physical design engineer internship in the United States is $139,408.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $140,000.00 per year, depending on experience, location, and employer.

What is a physical design engineer internship?

Physical Design Engineer internships are opportunities for students or recent graduates to gain hands-on experience in the field of semiconductor design, focusing on the physical implementation of integrated circuits (ICs). Interns typically work alongside experienced engineers to learn about tasks such as floorplanning, placement, routing, timing analysis, and verification using industry-standard Electronic Design Automation (EDA) tools. These internships provide exposure to the complete chip design flow, allowing interns to apply their knowledge of digital design and learn about key challenges in transforming logical circuit designs into manufacturable silicon. The experience is highly valuable for those seeking a career in VLSI or hardware engineering.

What do physical design engineer interns do?

As a Physical Design Engineer intern, you’ll typically assist with tasks such as floorplanning, placement, clock tree synthesis, and routing for integrated circuit (IC) designs. You may also help analyze timing, power, and area, supporting senior engineers in optimizing chip layouts. Interns often use industry-standard EDA tools and collaborate closely with teams in RTL design and verification. This hands-on experience allows you to develop your technical skills while gaining insight into the collaborative workflow of semiconductor design.

What are the key skills and qualifications needed to thrive as a physical design engineer intern?

To thrive as a Physical Design Engineer Intern, you generally need a solid understanding of digital circuit design, VLSI concepts, and coursework in electrical or computer engineering. Familiarity with EDA tools like Cadence, Synopsys, or Mentor Graphics, along with knowledge of scripting languages such as TCL or Python, is typically required. Strong analytical thinking, attention to detail, and effective communication skills help interns excel in team environments and complex problem-solving. These skills and qualifications are vital for ensuring accurate, efficient chip design and successful integration within engineering teams.

What is the difference between Physical Design Engineer Internship vs Digital IC Design Engineer?

AspectPhysical Design Engineer InternshipDigital IC Design Engineer
Required CredentialsTypically pursuing or recent graduate in Electrical Engineering or Computer EngineeringBachelor's or Master's in Electrical Engineering, Computer Engineering, or related field
Work EnvironmentInternship setting within semiconductor or electronics companies, hands-on design tasksFull-time professional role, involved in digital circuit design and verification
Employer & Industry UsageUsed by semiconductor companies, chip design firms, and tech companies for trainingFull-time employment in similar companies, focusing on digital IC development

The Physical Design Engineer Internship provides hands-on experience in chip layout and physical implementation, often for students or recent grads. In contrast, the Digital IC Design Engineer role involves full-time digital circuit design and verification. Both roles are essential in semiconductor development, but internships serve as entry points for aspiring engineers to gain industry exposure.

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Physical Design Engineer Internship jobs near you

Physical Design Engineer

Fractile

Bristol, VA • On-site

$80 - $120/hr

Other

Posted 13 days ago

Job description

Fractile’s mission is to enable a new chapter in the AI revolution. We’re pioneering AI innovation where hardware and software join to create something extraordinary, unlocking the power of the world’s largest language models with speed increases of x100. Our team is rapidly expanding, and we're searching for visionary engineers, scientists, and thinkers who share our passion for pushing boundaries and redefining what's possible. If you're ready to join a dynamic group of innovators shaping AI's future, we want to hear from you!

We are seeking a Physical Design Engineer to contribute to our next‑generation chip designs. As a Physical Design Engineer, you will support the implementation of complex IC physical designs, from synthesis to sign‑off. You will collaborate with cross‑functional teams, including logic design, verification, and process technology, to optimise performance, power, and area (PPA) while ensuring design integrity and manufacturability.

Key Responsibilities:
  • Support the physical implementation of ASIC/SoC designs, including floor planning, placement, clock tree synthesis (CTS), routing, and sign‑off.
  • Work on synthesis, timing analysis (STA), and optimisation to achieve strong PPA metrics.
  • Assist in power planning and analysis, addressing IR drop, electromigration, and related effects.
  • Ensure design rule check (DRC), layout vs. schematic (LVS), and other physical verification compliance.
  • Collaborate with DFT engineers to integrate design‑for‑test (DFT) structures into the physical implementation.
  • Develop flows in EDA tools such as Cadence Innovus, Synopsys Fusion Compiler, Mentor Graphics Calibre, and others.
  • Work closely with RTL and architecture teams to support design feasibility, constraints, and physical‑aware RTL design.
  • Work with advanced AI tools and models to improve productivity, analysis, and design quality.
Preferred Qualifications:
  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
  • 0–5 years of experience in physical design for advanced technology nodes (e.g., 7nm, 5nm, or below), including internships.
  • Familiarity with EDA tools for place & route, STA, and sign‑off.
  • Basic understanding of CMOS technology, semiconductor physics, and process limitations.
  • Exposure to timing closure, signal integrity, IR drop analysis, and formal verification.
  • Proficiency in scripting languages like TCL, Perl, or Python for automation is a plus.
  • Excellent problem‑solving skills, communication, and teamwork in a collaborative design environment.
  • Interest in working with advanced AI tools and models as part of the design workflow.
  • Experience or coursework in high‑performance computing (HPC), AI accelerators, or networking chips is a plus.
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