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Physical Design Engineer Internship Jobs in Indiana

ASIC Physical Design / Tape-Out Engineer

Lafayette, IN · On-site

$130.80K - $134.70K/yr

Title: ASIC Physical Design / Tape-Out Engineer Location: Lafayette, Indiana Type: Full time with Client Job Responsibilities: * Act as the primary interface between customers and semiconductor ...

The Design Engineer II is responsible for managing the integration, design, and development of ... relevant internships and demonstrated accomplishments may be credited toward experience.

Three years of engineering design experience within a manufacturing environment is desirable ... PHYSICAL DEMANDS / ENVIRONMENTAL FACTORS: Prolonged periods sitting at a desk and working on a ...

Three years of engineering design experience within a manufacturing environment is desirable ... PHYSICAL DEMANDS / ENVIRONMENTAL FACTORS: Prolonged periods sitting at a desk and working on a ...

The Senior Design Engineer is responsible for leading program level designs and prototype ... Utilize knowledge of engineering practices, mathematics, strengths of material and other physical ...

The Senior Design Engineer is responsible for leading program level designs and prototype ... Utilize knowledge of engineering practices, mathematics, strengths of material and other physical ...

The Senior Design Engineer is responsible for leading program level designs and prototype ... Utilize knowledge of engineering practices, mathematics, strengths of material and other physical ...

The Senior Design Engineer is responsible for leading program level designs and prototype ... Utilize knowledge of engineering practices, mathematics, strengths of material and other physical ...

The Senior Design Engineer is responsible for leading program level designs and prototype ... Utilize knowledge of engineering practices, mathematics, strengths of material and other physical ...

The Senior Design Engineer is responsible for leading program level designs and prototype ... Utilize knowledge of engineering practices, mathematics, strengths of material and other physical ...

The Senior Design Engineer is responsible for leading program level designs and prototype ... Utilize knowledge of engineering practices, mathematics, strengths of material and other physical ...

The Senior Design Engineer is responsible for leading program level designs and prototype ... Utilize knowledge of engineering practices, mathematics, strengths of material and other physical ...

The Senior Design Engineer is responsible for leading program level designs and prototype ... Utilize knowledge of engineering practices, mathematics, strengths of material and other physical ...

Design Engineer II Location US-IN-Warsaw # Positions 1 Category Engineering Position Description At ... Experience with SAP WORKING CONDITIONS/PHYSICAL DEMANDS * While performing the duties of this job ...

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Physical Design Engineer Internship information

See Indiana salary details

$90.4K

$134.6K

How much do physical design engineer internship jobs pay per year?

As of May 28, 2026, the average yearly pay for physical design engineer internship in Indiana is $132,656.00, according to ZipRecruiter salary data. Most workers in this role earn between $129,400.00 and $133,200.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as a Physical Design Engineer Intern, and why are they important?

To thrive as a Physical Design Engineer Intern, you generally need a solid understanding of digital circuit design, VLSI concepts, and coursework in electrical or computer engineering. Familiarity with EDA tools like Cadence, Synopsys, or Mentor Graphics, along with knowledge of scripting languages such as TCL or Python, is typically required. Strong analytical thinking, attention to detail, and effective communication skills help interns excel in team environments and complex problem-solving. These skills and qualifications are vital for ensuring accurate, efficient chip design and successful integration within engineering teams.

What are some typical projects or tasks a Physical Design Engineer intern can expect to work on during their internship?

As a Physical Design Engineer intern, you’ll typically assist with tasks such as floorplanning, placement, clock tree synthesis, and routing for integrated circuit (IC) designs. You may also help analyze timing, power, and area, supporting senior engineers in optimizing chip layouts. Interns often use industry-standard EDA tools and collaborate closely with teams in RTL design and verification. This hands-on experience allows you to develop your technical skills while gaining insight into the collaborative workflow of semiconductor design.

What are Physical Design Engineer internships?

Physical Design Engineer internships are opportunities for students or recent graduates to gain hands-on experience in the field of semiconductor design, focusing on the physical implementation of integrated circuits (ICs). Interns typically work alongside experienced engineers to learn about tasks such as floorplanning, placement, routing, timing analysis, and verification using industry-standard Electronic Design Automation (EDA) tools. These internships provide exposure to the complete chip design flow, allowing interns to apply their knowledge of digital design and learn about key challenges in transforming logical circuit designs into manufacturable silicon. The experience is highly valuable for those seeking a career in VLSI or hardware engineering.

What is the difference between Physical Design Engineer Internship vs Digital IC Design Engineer?

AspectPhysical Design Engineer InternshipDigital IC Design Engineer
Required CredentialsTypically pursuing or recent graduate in Electrical Engineering or Computer EngineeringBachelor's or Master's in Electrical Engineering, Computer Engineering, or related field
Work EnvironmentInternship setting within semiconductor or electronics companies, hands-on design tasksFull-time professional role, involved in digital circuit design and verification
Employer & Industry UsageUsed by semiconductor companies, chip design firms, and tech companies for trainingFull-time employment in similar companies, focusing on digital IC development

The Physical Design Engineer Internship provides hands-on experience in chip layout and physical implementation, often for students or recent grads. In contrast, the Digital IC Design Engineer role involves full-time digital circuit design and verification. Both roles are essential in semiconductor development, but internships serve as entry points for aspiring engineers to gain industry exposure.

What are the most commonly searched types of Physical Design Engineer jobs in Indiana? The most popular types of Physical Design Engineer jobs in Indiana are:
What cities in Indiana are hiring for Physical Design Engineer Internship jobs? Cities in Indiana with the most Physical Design Engineer Internship job openings:

ASIC Physical Design Engineer (TSMC / FinFET)

SolGenie Technologies, INC

Lafayette, IN

$131.10K - $134.90K/yr

Other

Posted 5 days ago


Job description

Hi

We’re hiring for a full-time opportunity with a leading semiconductor R&D organization in USA. This role focuses on TSMC advanced node tape-outs (FinFET), customer engagement, and backend sign-off flows. Detailed job description is given below.
 
Title: ASIC Physical Design Engineer (TSMC / FinFET)
Location: Lafayette, Indiana (“Relocation assistance provided”)
Type: Full time with Client
              Tapeout, Signoff, DRC/LVS/PEX, Customer interaction

Job Responsibilities:
  • Act as the primary interface between customers and semiconductor foundries to ensure successful tape-outs
  • Guide customers through design sign-off, including sharing required documentation and technical requirements
  • Collaborate with internal design, layout, and engineering teams to ensure manufacturability
  • Prepare, review, and validate designs for fabrication using EDA tools
  • Support customer engagements by providing technical expertise during pre-sales and project execution
  • Partner with customers throughout the chip design and manufacturing lifecycle to ensure a smooth experience
  • Coordinate with foundry partners (primarily TSMC) on specifications, timelines, and fabrication requirements
  • Track project milestones and drive on-time delivery
  • Maintain accurate documentation of project status, customer communication, and technical details
  • Identify and implement process improvements and automation opportunities

Must-Have Skills & Experience:

  • Proven tape-out experience with advanced TSMC nodes (e.g., FinFET technologies)
  • Strong understanding of semiconductor backend processes
  • Experience working directly with customers and external partners
  • Excellent communication skills (written and verbal)
  • Ability to manage multiple priorities and solve complex technical issues
  • Proactive, detail-oriented, and team-oriented mindset
  • Familiarity with Linux environments
  • Basic scripting or programming experience