ZipRecruiter

Log In

1

Internship Asic Rtl Design Engineer Jobs (NOW HIRING)

Waymo

ML ASIC Design Engineer

Mountain View, NY · Hybrid

... ASIC RTL design and microarchitecture * 3+ years designing and specifying microarchitectures of high performance computing cores (CPU/GPU/NPU) * Fluency in at least one high level programming ...

Nutanix

ASIC Design Engineer

San Diego, CA · On-site

$99 - $148/hr

Contribute to ASIC development activities including RTL design, static timing analysis, timing ... Programming or scripting experience with languages such as Python, Tcl, Perl, or similar.Strong ...

New

Google

RTL Design Engineer, TPU and ML

Sunnyvale, CA · On-site

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. * 4 years of experience in ASIC RTL design, with a focus on ...

Google

TPU RTL Design Engineer

Sunnyvale, CA · On-site

$159K/yr

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. * 2 years of experience in ASIC RTL design, with a focus on ...

Etched

RTL Design Engineer

Cupertino, CA · On-site

$2.0K/mo

RTL Design Engineer As an RTL Engineer at Etched, you will be critical in ensuring that our AI ... both our existing and upcoming ASIC designs. In this role, you will work closely with ...

Etech Hi

ASIC / VLSI Engineers

Milpitas, CA

ASIC / VLSI ENGINEERS - RTL / STA / PD / DV (Senior Level) We are hiring 4 experienced ASIC / VLSI ... RTL Engineer (Networking / Ethernet) * STA Engineer * Physical Design Engineer * Design ...

Etched

RTL Design Engineer

Cupertino, CA · On-site

$2.0K/mo

RTL Design Engineer As an RTL Engineer at Etched, you will be critical in ensuring that our AI ... both our existing and upcoming ASIC designs. In this role, you will work closely with ...

Apple

ASIC Design and Integration Engineer

Beaverton, OR

$129K - $194K/yr

Apple's Silicon Engineering team is looking for a highly skilled and motivated ASIC Design Engineer ... Develop RTL using SystemVerilog and perform synthesis. Verification: Engage with simulation-based ...

previous page

Showing results 41-60

All Jobsinternship JobsEngineering JobsEngineers JobsInternship Asic Rtl Design Engineer Jobs

Internship Asic Rtl Design Engineer information

See salary details

$94K

$150.2K

$202K

How much do internship asic rtl design engineer jobs pay per year?

As of Aug 24, 2026, the average yearly pay for internship asic rtl design engineer in the United States is $150,195.00, according to ZipRecruiter salary data. Most workers in this role earn between $131,500.00 and $180,000.00 per year, depending on experience, location, and employer.

What is an internship ASIC RTL design engineer?

An Internship ASIC RTL (Register Transfer Level) Design Engineer is a student or recent graduate who assists in designing and developing digital integrated circuits (ICs) using hardware description languages like Verilog or VHDL. They work under the guidance of senior engineers to create, simulate, and verify RTL code for ASIC (Application Specific Integrated Circuit) projects. The role provides hands-on experience with the chip design process, including synthesis, timing analysis, and verification. Interns gain valuable exposure to industry-standard tools and methodologies, helping them prepare for a full-time engineering career.

What does an internship ASIC RTL design engineer do?

As an ASIC RTL Design Engineering intern, you'll typically work on tasks such as writing and verifying RTL code using languages like Verilog or VHDL, assisting with simulation and debugging, and collaborating closely with senior engineers on real design blocks. Interns often participate in design reviews, update documentation, and may get hands-on experience with synthesis and timing analysis tools. This role is highly collaborative and provides exposure to the complete ASIC development cycle, making it an excellent opportunity to build foundational skills and gain insight into industry-standard methodologies.

What are the key skills and qualifications needed to thrive as an internship ASIC RTL design engineer?

To thrive as an Internship ASIC RTL Design Engineer, you need a solid understanding of digital logic design, computer architecture, and proficiency in HDL languages like Verilog or VHDL, typically supported by coursework in electrical or computer engineering. Familiarity with industry-standard EDA tools such as Synopsys, Cadence, or Mentor Graphics, and simulation environments is highly valuable. Strong analytical thinking, attention to detail, and effective communication skills help interns collaborate with teams and learn quickly in a fast-paced environment. These skills and qualities are essential for contributing to complex chip design projects and ensuring accuracy and efficiency in RTL development.

What is the difference between Internship Asic Rtl Design Engineer vs Asic Verification Engineer?

AspectInternship Asic Rtl Design EngineerAsic Verification Engineer
CredentialsTypically pursuing or recently completed a degree in Electrical Engineering or Computer EngineeringSimilar educational background, often with additional coursework in verification methodologies
Work EnvironmentInternship setting, supervised, focused on learning and assisting in RTL design tasksFull-time role, focused on testing and verifying RTL designs
Industry UsageUsed in semiconductor and chip design companies during early career stagesCommon in companies developing complex integrated circuits and chips

The Internship Asic Rtl Design Engineer focuses on assisting in RTL design tasks during an internship, emphasizing learning and support. In contrast, the Asic Verification Engineer is responsible for verifying RTL designs to ensure functionality. Both roles require similar educational backgrounds but differ in responsibilities and work environment, with verification roles being more advanced and permanent.

More about Internship Asic Rtl Design Engineer jobs

What cities are hiring for Internship Asic Rtl Design Engineer jobs?

Cities with the most Internship Asic Rtl Design Engineer job openings:

What are the most commonly searched types of Asic Rtl Design Engineer jobs?

The most popular types of Asic Rtl Design Engineer jobs are:

What states have the most Internship Asic Rtl Design Engineer jobs?

States with the most job openings for Internship Asic Rtl Design Engineer jobs include:

What job categories do people searching Internship Asic Rtl Design Engineer jobs look for?

The top searched job categories for Internship Asic Rtl Design Engineer jobs are:

Internship Asic Rtl Design Engineer jobs near you
Infographic showing various Internship Asic Rtl Design Engineer job openings in the United States as of August 2026, with employment types broken down into 45% Full Time, 9% Part Time, and 46% Contract. Highlights an 100% In-person job distribution, with an average salary of $150,195 per year, or $72.2 per hour.

ML ASIC Design Engineer

Waymo

Mountain View, NY • Hybrid

Full-time

Posted 15 days ago

Job description

Waymo's Compute Team is tasked with a critical and exciting mission: We deliver the compute platform responsible for running the fully autonomous vehicle's software stack. To achieve our mission, we architect and create high-performance custom silicon; we develop system-level compute architectures that push the boundaries of performance, power, and latency; and we collaborate closely with many other teammates to ensure we design and optimize hardware and software for maximum performance. We are a multidisciplinary team seeking curious and talented teammates to work on one of the world's highest performance automotive compute platforms.

This role follows a hybrid work schedule and you will report to the Senior Staff Silicon Engineer.

You will:

  • Work with researchers and architects to translate high level requirements into hardware features
  • Specify and design microarchitectures to deliver world class ML performance
  • Perform power, area and performance exploration and optimization of digital ASIC designs
  • Design high performance execution units, arithmetic circuits and programmable engines
  • Work with verification teams to guarantee functional correctness and performance

You have:

  • BS degree in Computer Engineering or equivalent practical experience
  • 5+ years of industry experience with SystemVerilog, ASIC RTL design and microarchitecture
  • 3+ years designing and specifying microarchitectures of high performance computing cores (CPU/GPU/NPU)
  • Fluency in at least one high level programming language such as Python, C++

We prefer:

  • Experience designing datapath elements of high performance cores (CPU/GPU/NPU)
  • Experience working with Chisel (Scala) or other higher-level hardware DSL's
  • Working knowledge of machine learning algorithms & how they map to hardware
  • Familiarity with Synthesis and power analysis tools
  • Experience working with formal tools for datapath verification

Apply