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Internship Asic Rtl Design Engineer Jobs in Chicago, IL

IMC

Hardware Engineer

Chicago, IL · On-site

$127K - $168K/yr

Design and implement RTL for next-generation ASIC platforms using SystemVerilog * Contribute to architecture and design discussions for performance-critical hardware systems * Develop new ...

IMC

Hardware Engineer

Chicago, IL · On-site

$127K - $167K/yr

Design and implement RTL for next-generation ASIC platforms using SystemVerilog * Contribute to architecture and design discussions for performance-critical hardware systems * Develop new ...

IMC

Hardware Engineer

Chicago, IL

$127K - $167K/yr

Design and implement RTL for next-generation ASIC platforms using SystemVerilog * Contribute to architecture and design discussions for performance-critical hardware systems * Develop new ...

Fermilab

Jr. ASIC Design Engineer

Batavia, IL · On-site

$70K - $93K/yr

We are looking for a Junior ASIC Design Engineer to lead and contribute to research activities and engineering work focused on developing custom instrumentation for extreme radiation and/or cryogenic ...

Sterling Engineering Inc.

Design Engineer

Wood Dale, IL · On-site

$60K - $75K/yr

Design Engineer Location: O'Hare Area, IL Job Type: Full-Time Compensation: $60,000-$75,000 per ... experience; internships, co-ops, university research, and hands-on engineering experience are ...

Edgehog Trading

Junior FPGA Developer

Chicago, IL · On-site

Our team spans trading, engineering, and business operations, working together to build and support ... with RTL design in Verilog or SystemVerilog - coursework, personal projects, or internship ...

Filtration Group Corp

Design Engineer

Des Plaines, IL

$85K - $96K/yr

Filtran is seeking a Design / Project Engineer to lead the design and development of advanced ... Previous product design experience (professional and/or internship). * Proficient in Creo with ...

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All JobsAsic Rtl Design Engineer JobsInternship Asic Rtl Design Engineer JobsInternship Asic Rtl Design Engineer Jobs in Chicago, IL

Internship Asic Rtl Design Engineer information

See Chicago, IL salary details

$96.8K

$154.7K

$208.1K

How much do internship asic rtl design engineer jobs pay per year?

As of Sep 14, 2026, the average yearly pay for internship asic rtl design engineer in Chicago, IL is $154,723.00, according to ZipRecruiter salary data. Most workers in this role earn between $135,500.00 and $185,400.00 per year, depending on experience, location, and employer.

What is an internship ASIC RTL design engineer?

An Internship ASIC RTL (Register Transfer Level) Design Engineer is a student or recent graduate who assists in designing and developing digital integrated circuits (ICs) using hardware description languages like Verilog or VHDL. They work under the guidance of senior engineers to create, simulate, and verify RTL code for ASIC (Application Specific Integrated Circuit) projects. The role provides hands-on experience with the chip design process, including synthesis, timing analysis, and verification. Interns gain valuable exposure to industry-standard tools and methodologies, helping them prepare for a full-time engineering career.

What does an internship ASIC RTL design engineer do?

As an ASIC RTL Design Engineering intern, you'll typically work on tasks such as writing and verifying RTL code using languages like Verilog or VHDL, assisting with simulation and debugging, and collaborating closely with senior engineers on real design blocks. Interns often participate in design reviews, update documentation, and may get hands-on experience with synthesis and timing analysis tools. This role is highly collaborative and provides exposure to the complete ASIC development cycle, making it an excellent opportunity to build foundational skills and gain insight into industry-standard methodologies.

What are the key skills and qualifications needed to thrive as an internship ASIC RTL design engineer?

To thrive as an Internship ASIC RTL Design Engineer, you need a solid understanding of digital logic design, computer architecture, and proficiency in HDL languages like Verilog or VHDL, typically supported by coursework in electrical or computer engineering. Familiarity with industry-standard EDA tools such as Synopsys, Cadence, or Mentor Graphics, and simulation environments is highly valuable. Strong analytical thinking, attention to detail, and effective communication skills help interns collaborate with teams and learn quickly in a fast-paced environment. These skills and qualities are essential for contributing to complex chip design projects and ensuring accuracy and efficiency in RTL development.

What is the difference between Internship Asic Rtl Design Engineer vs Asic Verification Engineer?

AspectInternship Asic Rtl Design EngineerAsic Verification Engineer
CredentialsTypically pursuing or recently completed a degree in Electrical Engineering or Computer EngineeringSimilar educational background, often with additional coursework in verification methodologies
Work EnvironmentInternship setting, supervised, focused on learning and assisting in RTL design tasksFull-time role, focused on testing and verifying RTL designs
Industry UsageUsed in semiconductor and chip design companies during early career stagesCommon in companies developing complex integrated circuits and chips

The Internship Asic Rtl Design Engineer focuses on assisting in RTL design tasks during an internship, emphasizing learning and support. In contrast, the Asic Verification Engineer is responsible for verifying RTL designs to ensure functionality. Both roles require similar educational backgrounds but differ in responsibilities and work environment, with verification roles being more advanced and permanent.

What are the most commonly searched types of Asic Rtl Design Engineer jobs in Chicago, IL?

The most popular types of Asic Rtl Design Engineer jobs in Chicago, IL are:

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For Internship Asic Rtl Design Engineer jobs in Chicago, IL, the most frequently searched job titles are:

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Internship Asic Rtl Design Engineer jobs near you
Infographic showing various Internship Asic Rtl Design Engineer job openings in Chicago, IL as of September 2026, with employment types broken down into 1% Internship, 87% Full Time, 9% Part Time, and 3% Contract. Highlights an 81% Physical, 4% Hybrid, and 15% Remote job distribution, with an average salary of $154,723 per year, or $74.4 per hour.

Hardware Engineer

Chicago, IL • On-site

IMC
See more jobs at IMCexternal

$127K - $168K/yr

Other

PTO

Re-posted 21 days ago

Job description

IMC is seeking a Hardware Engineer to join our Global Hardware team and help develop the next generation of custom ASICs that power our trading infrastructure.
As a member of the Global Hardware organization, you'll work on long-term, high-impact engineering challenges that directly influence the performance and scalability of IMC's trading systems. This team focuses on designing proprietary hardware solutions that deliver meaningful advantages in latency-sensitive environments, partnering closely with software engineers, researchers, and trading teams to solve complex technical problems.
This role combines hardware design, verification, and system-level thinking. You'll contribute across the ASIC development lifecycle, from RTL design and validation to integration within larger hardware platforms. Because of the team's size and collaborative culture, engineers have broad ownership and exposure to multiple aspects of the design process rather than being confined to a narrow specialization.
What You'll Do
ASIC Design & Development
  • Participate in the full ASIC development lifecycle, from specification through integration and deployment
  • Design and implement RTL for next-generation ASIC platforms using SystemVerilog
  • Contribute to architecture and design discussions for performance-critical hardware systems
  • Develop new functionality that supports evolving trading and infrastructure requirements
  • Collaborate with hardware, software, and research teams to translate requirements into scalable solutions
Verification & Testing
  • Develop unit tests and verification environments for RTL designs
  • Validate functionality and performance of hardware components
  • Debug design and integration issues throughout the development process
  • Contribute to verification methodologies and testing infrastructure
  • Ensure designs meet reliability, performance, and maintainability requirements
Engineering & Tooling
  • Develop scripts and tooling to improve engineering workflows
  • Support automation efforts across design and verification processes
  • Contribute to continuous improvements in development methodologies and engineering practices
What You Bring
  • BS+ in Electrical Engineering, Computer Engineering, Computer Science, or a related technical discipline
  • Strong experience with RTL design and development using SystemVerilog
  • Strong understanding of digital design fundamentals
  • Working knowledge of C++
  • Experience developing and executing verification and test strategies
  • Experience working with multi-clock-domain designs and clock-domain crossing concepts
  • Solid understanding of Ethernet protocols and networking fundamentals
  • Experience with Python, Bash, or similar scripting languages
  • Strong debugging and problem-solving skills
  • Ability to collaborate effectively across multiple engineering disciplines
Nice to Have
  • ASIC development experience
  • FPGA development experience with relevant ASIC design exposure
  • Familiarity with PMA (Physical Media Attachment) technologies
  • Experience with high-performance networking systems
  • Experience designing low-latency or performance-sensitive systems
  • Exposure to trading, market infrastructure, or financial technology environments
  • Experience building verification frameworks or test automation tools
  • Strong C++ development skills
What Makes Someone Successful in This Role
  • Balances architecture-level thinking with hands-on implementation
  • Enjoys solving difficult technical problems across hardware and software domains
  • Takes ownership of systems and follows through from design to deployment
  • Demonstrates strong attention to detail and engineering rigor
  • Thrives in collaborative environments and works well across teams
  • Learns quickly and adapts to evolving technical challenges
  • Communicates clearly and effectively with both technical and non-technical stakeholders
About Us
IMC is a global trading firm powered by a cutting-edge research environment and a world-class technology backbone. Since 1989, we've been a stabilizing force in financial markets, providing essential liquidity upon which market participants depend. Across our offices in the US, Europe, Asia Pacific, and India, our talented quant researchers, engineers, traders, and business operations professionals are united by our uniquely collaborative, high-performance culture and commitment to continuous innovation.
The Base Salary range for the role is included below. Base salary is only one component of total compensation; all full-time, permanent positions are eligible for a discretionary bonus and benefits, including paid leave and insurance. Please visit Benefits - US | IMC Trading for more comprehensive information.
The Base Salary range for the role is included below. Base salary is only one component of total compensation; all full-time, permanent positions are eligible for a discretionary bonus and benefits, including paid leave and insurance. Please visit Benefits - US | IMC Trading for more comprehensive information.
Salary Range
$200,000-$225,000 USD
About Us
IMC is a research-driven trading firm where quantitative modeling, machine learning, and engineering shape how modern markets are traded. A stabilizing force in markets since 1989, we provide liquidity across trading venues, delivering the best outcome in value and risk management to investors. Using our own technology and capital, we build proprietary systems and algorithms that operate across global markets. Our researchers, traders, and engineers work as a collective, combining rapid experimentation, advanced infrastructure, and real-time feedback to turn insight into execution and execution into advantage.

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