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Temporary Asic Design Engineer Jobs in Chicago, IL

Fermilab

Jr. ASIC Design Engineer

Batavia, IL · On-site

$70K - $93K/yr

We are looking for a Junior ASIC Design Engineer to lead and contribute to research activities and engineering work focused on developing custom instrumentation for extreme radiation and/or cryogenic ...

IMC

Hardware Engineer

Chicago, IL · On-site

$127K - $168K/yr

What You'll Do ASIC Design & Development * Participate in the full ASIC development lifecycle, from specification through integration and deployment * Design and implement RTL for next-generation ...

IMC

Hardware Engineer

Chicago, IL · On-site

$127K - $167K/yr

What You'll Do ASIC Design & Development * Participate in the full ASIC development lifecycle, from specification through integration and deployment * Design and implement RTL for next-generation ...

IMC

Hardware Engineer

Chicago, IL · On-site

$127K - $167K/yr

IMC is seeking a Hardware Engineer to join our Global Hardware team and help develop the next ... You'll contribute across the ASIC development lifecycle, from RTL design and validation to ...

Socket.dev

Hardware Engineer

Chicago, IL · On-site

$200 - $225/hr

Design and implement RTL for next-generation ASIC platforms using SystemVerilog * Contribute to architecture and design discussions for performance-critical hardware systems * Develop new ...

Actalent

Design Engineer

Wheaton, IL

$48.08 - $62.50/hr

Design Engineer (Remote)Help Modernize the Future of the Electric Grid Are you ready to take your ... If eligible, the benefits available for this temporary role may include the following: * Medical ...

Actalent

Pcb Design Engineer

Niles, IL

$60 - $90/hr

PCB Design Engineer (Contract) This contract role offers an experienced PCB Design Engineer the ... If eligible, the benefits available for this temporary role may include the following: * Medical ...

Eliyan

PD - Principal, Physical Design

Mundelein, IL

As an Eliyan Principal Physical Design Engineer, you will be working at a fast-paced early-stage ... Qualifications: * 8 to 12 years ASIC physical design experience owning floorplanning integration ...

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All JobsAsic Design Engineer JobsTemporary Asic Design Engineer JobsTemporary Asic Design Engineer Jobs in Chicago, IL

Temporary Asic Design Engineer information

See Chicago, IL salary details

$96.8K

$154.7K

$208.1K

How much do temporary asic design engineer jobs pay per year?

As of Aug 10, 2026, the average yearly pay for temporary asic design engineer in Chicago, IL is $154,723.00, according to ZipRecruiter salary data. Most workers in this role earn between $135,500.00 and $185,400.00 per year, depending on experience, location, and employer.

How much does a temporary ASIC design engineer make?

A temporary ASIC design engineer typically earns between $40 and $70 per hour, depending on experience, location, and project complexity. Compensation may also include benefits such as flexible schedules and exposure to advanced design tools like Verilog and VHDL.

Are temporary ASIC design engineers in demand?

Temporary ASIC design engineers are in demand due to the ongoing need for specialized hardware development in industries like telecommunications, consumer electronics, and data centers. Skills in hardware description languages such as VHDL or Verilog and experience with FPGA prototyping can enhance employability in this field. The demand often correlates with industry trends toward custom chip solutions and rapid product development cycles.

What is the difference between Temporary Asic Design Engineer vs Temporary FPGA Design Engineer?

AspectTemporary Asic Design EngineerTemporary FPGA Design Engineer
Required SkillsASIC architecture, digital design, verification, HDL (Verilog/VHDL)FPGA development, HDL (Verilog/VHDL), prototyping
Work EnvironmentSemiconductor companies, chip design labsPrototyping labs, FPGA manufacturing facilities
Industry UsageIntegrated circuit manufacturing, consumer electronicsPrototyping, testing, and development projects

Temporary Asic Design Engineers focus on designing and verifying ASIC chips, often working in semiconductor companies. Temporary FPGA Design Engineers work on FPGA prototyping and testing, typically in research or development labs. Both roles require HDL skills but differ in their focus on chip fabrication versus flexible prototyping.

What are the most commonly searched types of Asic Design Engineer jobs in Chicago, IL? The most popular types of Asic Design Engineer jobs in Chicago, IL are:
What are popular job titles related to Temporary Asic Design Engineer jobs in Chicago, IL? For Temporary Asic Design Engineer jobs in Chicago, IL, the most frequently searched job titles are:
What job categories do people searching Temporary Asic Design Engineer jobs in Chicago, IL look for? The top searched job categories for Temporary Asic Design Engineer jobs in Chicago, IL are:
Temporary Asic Design Engineer jobs near you

Jr. ASIC Design Engineer

Fermilab

Batavia, IL • On-site

$70K - $93K/yr

Full-time

Medical, Dental, Vision, Life, Retirement, PTO

Re-posted 19 days ago

Fermilab rating

9.1

Company rating: 9.1 out of 10

Based on 9 frontline employees who took The Breakroom Quiz

11th of 120 rated laboratories

Job description

The expected hiring range for this position is:
$70,800.00-$93,200.00.
Please note that the pay range information is a general guideline only. The pay offered to a selected candidate will be determined based on factors such the scope and responsibilities of the position, qualifications of the selected candidate, business considerations, internal equity, and external market pay for comparable jobs.
About the Role:
We are looking for a Junior ASIC Design Engineer to lead and contribute to research activities and engineering work focused on developing custom instrumentation for extreme radiation and/or cryogenic environments.
What your day-to-day as a Junior ASIC Design Engineer at Fermilab will look like:
  • Performing a leading role in Analog and RF ASIC design projects, while being able to contribute individually to major design tasks.
  • Developing design specifications for ASICs based on theoretical analyses and in conjunction with application needs.
  • Designing circuit networks using schematic entry and layout tools with full custom or timing-driven layout tools in Cadence CAD/EDA or a similar environment.
  • Models circuit networks and system components in hardware-description languages (Verilog-A and Verilog/SystemVerilog).
  • Building test benches and carries out analog and/or RF circuit simulations.
  • Executing physical and functional circuit and system verification.
  • Preparing documentation and participates in test-board designs and laboratory testing.
  • Delivering presentations internally, at national and international workshops, and at the topical conferences.
  • Performing other duties as assigned by supervisor.
  • Abiding by and being responsible for performing all duties in accordance with all environmental, health and safety regulations and practices pertinent to this position.

Skills and Attributes for Success:
  • Bachelor's degree in an applicable Engineering discipline from an ABET accredited institution.

Applicable Knowledge, Skills and Abilities Required:
  • Readiness for working on challenging projects that may have tight schedules.
  • Capability of working as part of a design team in a research and development environment
  • Experience with industry-standard front-end and back-end CAD/EDA design tools, such as Cadence, Synopsys and Mentor for the IC design.
  • Familiarity with principles of instrumentation for radiation detection with solid state or gaseous detectors and usages in extreme environments, like cryogenic or radiation harsh conditions
  • Strong computer skills and competence in performing analytical engineering calculations, in drawing schematics and in documentation.

Work Arrangement:
Please note that the described work arrangement is subject to change based on business needs and is not guaranteed to be final.
  • Hybrid: is a work arrangement in which an employee as part of an ongoing regular schedule, works at an alternative worksite in the United States (e.g., an employee's residence) on some days and at the primary worksite on other days. Requires an approved hybrid work request for one or more days a week worked remotely within the United States on a routine basis.

Benefits/Perks:
Fermilab offers a competitive and comprehensive benefits program, including:
Medical, Dental, Vision and Flexible Spending Accounts
  • Paid time off
  • Life insurance
  • Short and Long-term disability insurance
  • Retirement benefits
  • Onsite day care

Why Fermilab:
Fermilab is America's premier laboratory for particle physics and accelerator research, funded by the U.S. Department of Energy. We support discovery science experiments in Illinois and locations around the world, including deep underground mines in South Dakota and Canada, mountaintops in Arizona and Chile, CERN in Europe and the South Pole.
Pre-Employment Screening:
Drug-Free Workplace & Pre-Employment Screening
Fermilab is dedicated to fostering a safe, productive and drug-free environment. An offer of employment is contingent upon the successful completion of a background check and drug screening.
HSPD-12
In accordance with Homeland Security Presidential Directive 12 (HSPD-12) new employees are required to obtain and maintain a HSPD-12 Personal Identity Verification (PIV) Credential. To obtain this credential, new employees must successfully complete and pass a federal background check investigation. This investigation includes a declaration of illegal drug activities, including use, supply, possession, or manufacture. This includes marijuana and cannabis derivatives, which are still considered illegal under federal law, regardless of state laws. Failure to obtain or maintain such government access authorization could result in the withdrawal of a job offer or future termination of employment.
Foreign Government Sponsored Activities
Fermilab employees, and certain guest researchers and contractors, are subject to particular restrictions related to participation in Foreign Government Sponsored or Affiliated Activities, as defined and detailed in United States Department of Energy Order 486.1A. Such individuals will be asked to disclose any participation for review by Fermilab's Office of General Counsel.
REAL-ID Requirement for access to Fermilab Campus
Fermilab requires all members of the public to produce a REAL-ID, or equivalent, to access the Fermilab Campus for interviews or career events. A list of acceptable forms of ID can be found here: https://get-connected.fnal.gov/wp-content/uploads/2021/09/REALID-Documents.pdf. If a candidate is selected for an interview but does not possess any of the equivalent documents, we may schedule a virtual interview.
Equal Opportunity Statement
Fermilab is an equal opportunity employer. We evaluate qualified applicants without regard to race, color, religion, sex, age, national origin, disability, veteran status, genetic information, and other legally protected categories.

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