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Internship Asic Rtl Design Engineer Jobs in Chicago, IL

Design Engineer I

Chicago, IL · On-site

$33 - $48/hr

Internship or co-op experience in civil design or construction projects. * Knowledge of local, state, and federal engineering standards and permitting processes. * Engineer-In-Training (EIT ...

Design Engineer I

Chicago, IL · On-site

$33 - $48/hr

Internship or co-op experience in civil design or construction projects. * Knowledge of local, state, and federal engineering standards and permitting processes. * Engineer-In-Training (EIT ...

Design Engineer I

Chicago, IL · On-site

$33 - $48/hr

Internship or co-op experience in civil design or construction projects. * Knowledge of local, state, and federal engineering standards and permitting processes. * Engineer-In-Training (EIT ...

... design and development * Experience with RTL (SystemVerilog/Verilog/VHDL) * Previous internship ... Any programming close to the metal with CPU, GPU, microprocessors, etc. * Linux kernel and driver ...

We design and manufacture high performance valves that meet virtually any need encountered in ... The goal of HydraForce's internship program is to develop future engineering resources for our ...

We design and manufacture high performance valves that meet virtually any need encountered in ... The goal of HydraForce's internship program is to develop future engineering resources for our ...

We design and manufacture high performance valves that meet virtually any need encountered in ... The goal of HydraForce's internship program is to develop future engineering resources for our ...

We design and manufacture high performance valves that meet virtually any need encountered in ... The goal of HydraForce's internship program is to develop future engineering resources for our ...

We design and manufacture high performance valves that meet virtually any need encountered in ... The goal of HydraForce's internship program is to develop future engineering resources for our ...

We design and manufacture high performance valves that meet virtually any need encountered in ... The goal of HydraForce's internship program is to develop future engineering resources for our ...

We design and manufacture high performance valves that meet virtually any need encountered in ... The goal of HydraForce's internship program is to develop future engineering resources for our ...

Mechanical Engineer

Wood Dale, IL · On-site

$68K - $75K/yr

Previous engineering internship or co-op is required * Understanding of GD&T, manufacturing drawings, and mechanical design principles * Experience with machining, fabrication, or assembly processes ...

Showing results 21-40

Internship Asic Rtl Design Engineer information

See Chicago, IL salary details

$96.8K

$154.7K

$208.1K

How much do internship asic rtl design engineer jobs pay per year?

As of Sep 14, 2026, the average yearly pay for internship asic rtl design engineer in Chicago, IL is $154,723.00, according to ZipRecruiter salary data. Most workers in this role earn between $135,500.00 and $185,400.00 per year, depending on experience, location, and employer.

What is an internship ASIC RTL design engineer?

An Internship ASIC RTL (Register Transfer Level) Design Engineer is a student or recent graduate who assists in designing and developing digital integrated circuits (ICs) using hardware description languages like Verilog or VHDL. They work under the guidance of senior engineers to create, simulate, and verify RTL code for ASIC (Application Specific Integrated Circuit) projects. The role provides hands-on experience with the chip design process, including synthesis, timing analysis, and verification. Interns gain valuable exposure to industry-standard tools and methodologies, helping them prepare for a full-time engineering career.

What does an internship ASIC RTL design engineer do?

As an ASIC RTL Design Engineering intern, you'll typically work on tasks such as writing and verifying RTL code using languages like Verilog or VHDL, assisting with simulation and debugging, and collaborating closely with senior engineers on real design blocks. Interns often participate in design reviews, update documentation, and may get hands-on experience with synthesis and timing analysis tools. This role is highly collaborative and provides exposure to the complete ASIC development cycle, making it an excellent opportunity to build foundational skills and gain insight into industry-standard methodologies.

What are the key skills and qualifications needed to thrive as an internship ASIC RTL design engineer?

To thrive as an Internship ASIC RTL Design Engineer, you need a solid understanding of digital logic design, computer architecture, and proficiency in HDL languages like Verilog or VHDL, typically supported by coursework in electrical or computer engineering. Familiarity with industry-standard EDA tools such as Synopsys, Cadence, or Mentor Graphics, and simulation environments is highly valuable. Strong analytical thinking, attention to detail, and effective communication skills help interns collaborate with teams and learn quickly in a fast-paced environment. These skills and qualities are essential for contributing to complex chip design projects and ensuring accuracy and efficiency in RTL development.

What is the difference between Internship Asic Rtl Design Engineer vs Asic Verification Engineer?

AspectInternship Asic Rtl Design EngineerAsic Verification Engineer
CredentialsTypically pursuing or recently completed a degree in Electrical Engineering or Computer EngineeringSimilar educational background, often with additional coursework in verification methodologies
Work EnvironmentInternship setting, supervised, focused on learning and assisting in RTL design tasksFull-time role, focused on testing and verifying RTL designs
Industry UsageUsed in semiconductor and chip design companies during early career stagesCommon in companies developing complex integrated circuits and chips

The Internship Asic Rtl Design Engineer focuses on assisting in RTL design tasks during an internship, emphasizing learning and support. In contrast, the Asic Verification Engineer is responsible for verifying RTL designs to ensure functionality. Both roles require similar educational backgrounds but differ in responsibilities and work environment, with verification roles being more advanced and permanent.

What are the most commonly searched types of Asic Rtl Design Engineer jobs in Chicago, IL?

The most popular types of Asic Rtl Design Engineer jobs in Chicago, IL are:

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For Internship Asic Rtl Design Engineer jobs in Chicago, IL, the most frequently searched job titles are:

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The top searched job categories for Internship Asic Rtl Design Engineer jobs in Chicago, IL are:

What cities near Chicago, IL are hiring for Internship Asic Rtl Design Engineer jobs?

Cities near Chicago, IL with the most Internship Asic Rtl Design Engineer job openings:

Infographic showing various Internship Asic Rtl Design Engineer job openings in Chicago, IL as of September 2026, with employment types broken down into 1% Internship, 87% Full Time, 9% Part Time, and 3% Contract. Highlights an 81% Physical, 4% Hybrid, and 15% Remote job distribution, with an average salary of $154,723 per year, or $74.4 per hour.

Senior Staff Digital Design (FPGA) Engineer - Rolling Meadows, IL

Rolling Meadows, IL • On-site

$130K - $160K/yr

Full-time

Medical, Dental, Vision, Life, Retirement, PTO

Posted 13 days ago


Job description

Description

COMPANY BACKGROUND

Epiq Solutions develops cutting-edge software-defined radio (SDR) products and processing solutions to enable spectrum dominance for maritime, land, air, and space domains. With 15 years serving government and commercial enterprise customers and 25K+ devices fielded to date, Epiq Solutions is a trusted partner with a proven heritage of delivering open architecture products in radically small form factors where time-to-market, cost, and performance are critical for mission success.


For more information, visit https://epiqsolutions.com.


JOB OPENING

We are seeking a highly skilled and experienced Senior Staff Digital Design (FPGA) Engineer to join our dynamic engineering team. In this role, you will be instrumental in designing, implementing, and optimizing field-programmable gate array (FPGA) solutions that are critical to our product's performance and success. If you have a passion for hardware development and a record of excellence in FPGA design, we invite you to apply and help shape the future of our innovative technology.


JOB RESPONSIBILITIES

  • Design and implement complex FPGA designs including requirements analysis, specification, RTL coding, simulation, and verification.
  • Optimize FPGA designs for performance, resource utilization, power, and cost.
  • Collaborate with hardware engineers to define board-level interfaces and ensure the successful integration of FPGA designs.
  • Develop and maintain FPGA design documentation, including design specifications, test plans, and user guides.
  • Participate in code reviews and promote best practices in RTL coding and design.
  • Develop FPGA verification environments using self-checking testbenches and advanced verification methodologies.
  • Debug and troubleshoot FPGA designs at both the hardware and system level.
  • Participate in architectural discussions and contribute to the development of system-level solutions.
  • Maintain knowledge of the latest FPGA technologies and best practices to ensure designs are up-to-date and efficient.
  • Support the creation of project timelines and milestones, ensuring FPGA design tasks meet project deadlines.
  • Interface with customers and stakeholders to gather requirements and provide technical support as needed.
  • Continuously improve the FPGA development process, proposing and implementing design and verification flow enhancements.
  • Mentor and coach junior staff on FPGA design techniques and industry standards.
  • Collaborate with cross-functional teams including software, mechanical, and systems engineering to deliver high-quality products.

Requirements

JOB REQUIREMENTS

  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field
  • Minimum of 7 years of experience in FPGA design and development
  • Ability to work with cross-functional teams (software, hardware, and mechanical engineers) to integrate and debug systems
  • Excellent problem-solving and analytical skills
  • Proficiency in hardware description languages (HDLs), such as VHDL or Verilog
  • Deep understanding of the FPGA implementation process including synthesis, place and route, and timing closure
  • Knowledge and understanding of RF digital signal processing (DSP) techniques and implementation on FPGAs
  • Experience with AMD FPGAs and SoC's (Artix, Kintex, Zynq MPSoC, Versal) and AMD adaptive computing design implementation and verification tools (Vivado, Vitis)
  • Understanding of high-speed communication protocols and interfaces such as PCIe, Gigabit Ethernet, JESD204B/C, DDR, etc.
  • Strong background in electronics and circuit design, including schematic entry and PCB layout, and power considerations for FPGAs
  • Experience with version control systems, like Git or SVN
  • Eligibility to work on Federal contracts which require US Citizenship


BENEFITS

  • Join a successful and growing company investing in our future success
  • Flexible work hours
  • Generous vacation policy
  • Paid five-week sabbatical every five years
  • 401(k) matching
  • Health, dental, vision insurance
  • Life and long-term disability insurance
  • Employee assistance program
  • Wellness reimbursement
  • Charitable giving company match
  • Competitive salary commensurate with experience and performance
  • Fun, laid-back culture and rewarding work!

Epiq Solutions is an Equal Employment Opportunity Employer - All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.