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Internship Asic Rtl Design Engineer Jobs in Chicago, IL

Jump Trading

Campus FPGA Engineer (Intern)

Chicago, IL · On-site

$250K/yr

Experience with FPGA or other hardware/systems design and development * Experience with RTL (SystemVerilog/Verilog/VHDL) * Previous internship experience in hardware or low-level software engineering

Jump Trading

Campus FPGA Engineer (Intern)

Chicago, IL

$250K/yr

Experience with FPGA or other hardware/systems design and development * Experience with RTL (SystemVerilog/Verilog/VHDL) * Previous internship experience in hardware or low-level software engineering

Eliyan

PD - Principal, Physical Design

Mundelein, IL · On-site

As an Eliyan Principal Physical Design Engineer, you will be working at a fast-paced early-stage ... You will drive the development of cutting-edge ASICs from RTL to GDSII. You will work with a cross ...

Quanta Services

Design Engineer - Civil

Chicago, IL · On-site +1

HBK Engineering, LLC is a fully licensed, professional engineering design firm headquartered in ... Required 2.5+ years of relevant experience (not internships) * US driver's license and US work ...

Eliyan

Architecture - I/O Architect

Mundelein, IL · On-site

Mentor engineers on protocol implementation, timing constraints, and hierarchical design ... Extremely knowledgeable on RTL-to-GDSII flows, limitations, and flexibilities to improve ...

IMC

Hardware Engineer Intern - Summer 2027

Chicago, IL · On-site

$200K/yr

Our 10-week internship is your chance to experience life as a Hardware Engineer at IMC. You'll have ... Enhance your knowledge of algorithm complexity, professional design, and coding * Work on ...

IMC

Hardware Engineer Intern - Summer 2027

Chicago, IL · On-site

$200K/yr

Our 10-week internship is your chance to experience life as a Hardware Engineer at IMC. You'll have ... Enhance your knowledge of algorithm complexity, professional design, and coding * Work on ...

One Design Company

Design Intern

Chicago, IL · On-site

This is a paid internship running Summer 2026. What to expect You'll be embedded in the studio as a ... developers * Strengthen your ability to take creative risks and advocate for your ideas * Leave ...

OceanComm, Inc.

Engineering Intern / Co-op

Chicago, IL · On-site

$35 - $55/hr

Many of our past interns have gone on to join OceanComm full-time. Strong performers will be ... Experience with CAD / 3D printing * Familiarity with lab equipment (e.g. oscilloscopes, probes ...

OceanComm, Inc.

Engineering Intern / Co-op

Chicago, IL · On-site

$35 - $55/hr

Many of our past interns have gone on to join OceanComm full-time. Strong performers will be ... Experience with CAD / 3D printing * Familiarity with lab equipment (e.g. oscilloscopes, probes ...

MatrixSpace

FPGA Engineer

Hoffman Estates, IL · Remote

$150K - $200K/yr

Design and develop FPGA architectures and high-throughput data paths for radar sensing systems ... Strong RTL development skills using System Verilog, Verilog, VHDL, HLS, or similar, from ...

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All JobsAsic Rtl Design Engineer JobsInternship Asic Rtl Design Engineer JobsInternship Asic Rtl Design Engineer Jobs in Chicago, IL

Internship Asic Rtl Design Engineer information

See Chicago, IL salary details

$96.8K

$154.7K

$208.1K

How much do internship asic rtl design engineer jobs pay per year?

As of Jul 17, 2026, the average yearly pay for internship asic rtl design engineer in Chicago, IL is $154,723.00, according to ZipRecruiter salary data. Most workers in this role earn between $135,500.00 and $185,400.00 per year, depending on experience, location, and employer.

What types of projects and responsibilities can an intern expect as an ASIC RTL Design Engineer?

As an ASIC RTL Design Engineering intern, you'll typically work on tasks such as writing and verifying RTL code using languages like Verilog or VHDL, assisting with simulation and debugging, and collaborating closely with senior engineers on real design blocks. Interns often participate in design reviews, update documentation, and may get hands-on experience with synthesis and timing analysis tools. This role is highly collaborative and provides exposure to the complete ASIC development cycle, making it an excellent opportunity to build foundational skills and gain insight into industry-standard methodologies.

What are the key skills and qualifications needed to thrive as an Internship ASIC RTL Design Engineer, and why are they important?

To thrive as an Internship ASIC RTL Design Engineer, you need a solid understanding of digital logic design, computer architecture, and proficiency in HDL languages like Verilog or VHDL, typically supported by coursework in electrical or computer engineering. Familiarity with industry-standard EDA tools such as Synopsys, Cadence, or Mentor Graphics, and simulation environments is highly valuable. Strong analytical thinking, attention to detail, and effective communication skills help interns collaborate with teams and learn quickly in a fast-paced environment. These skills and qualities are essential for contributing to complex chip design projects and ensuring accuracy and efficiency in RTL development.

What is an Internship ASIC RTL Design Engineer?

An Internship ASIC RTL (Register Transfer Level) Design Engineer is a student or recent graduate who assists in designing and developing digital integrated circuits (ICs) using hardware description languages like Verilog or VHDL. They work under the guidance of senior engineers to create, simulate, and verify RTL code for ASIC (Application Specific Integrated Circuit) projects. The role provides hands-on experience with the chip design process, including synthesis, timing analysis, and verification. Interns gain valuable exposure to industry-standard tools and methodologies, helping them prepare for a full-time engineering career.

What is the difference between Internship Asic Rtl Design Engineer vs Asic Verification Engineer?

AspectInternship Asic Rtl Design EngineerAsic Verification Engineer
CredentialsTypically pursuing or recently completed a degree in Electrical Engineering or Computer EngineeringSimilar educational background, often with additional coursework in verification methodologies
Work EnvironmentInternship setting, supervised, focused on learning and assisting in RTL design tasksFull-time role, focused on testing and verifying RTL designs
Industry UsageUsed in semiconductor and chip design companies during early career stagesCommon in companies developing complex integrated circuits and chips

The Internship Asic Rtl Design Engineer focuses on assisting in RTL design tasks during an internship, emphasizing learning and support. In contrast, the Asic Verification Engineer is responsible for verifying RTL designs to ensure functionality. Both roles require similar educational backgrounds but differ in responsibilities and work environment, with verification roles being more advanced and permanent.

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Internship Asic Rtl Design Engineer jobs near you
Campus FPGA Engineer (Intern)

Campus FPGA Engineer (Intern)

Jump Trading

Chicago, IL • On-site

$250K/yr

Full-time, Internship

Posted 9 days ago

Job description

Jump Trading Group is committed to world class research. We empower exceptional talents in Mathematics, Physics, and Computer Science to seek scientific boundaries, push through them, and apply cutting edge research to global financial markets. Our culture is unique. Constant innovation requires fearlessness, creativity, intellectual honesty, and a relentless competitive streak. We believe in winning together and unlocking unique individual talent by incenting collaboration and mutual respect. At Jump, research outcomes drive more than superior risk adjusted returns. We design, develop, and deploy technologies that change our world, fund start-ups across industries, and partner with leading global research organizations and universities to solve problems.
Core Development is a global team of technologists who architect, build and maintain our world-class trading platform. From optimizing our core trading engine to building custom hardware, we leverage software & hardware engineering, data science and research, to deliver the infrastructure and tools that drive our trading and business needs.
What You'll Do:
We're looking for engineers to join our FPGA team that is building next-generation, ultra-low-latency systems to power trading with machine learning and other algorithms on a global scale.
This is an opportunity to work on complex problems around networking, high performance computing, and real-time acceleration where we can't just use off-the-shelf hardware.
You'll work alongside a small team of experienced engineers who came to Jump from leading companies in FPGAs, semiconductors, networking cards, and more... as well as PhDs from top FPGA research labs around the world.
Other duties as assigned or needed
Skills You'll Need:
  • Undergraduate or Graduate concentration in Electrical Engineering, Computer Science, or related areas
  • Experience with FPGA or other hardware/systems design and development
  • Experience with RTL (SystemVerilog/Verilog/VHDL)
  • Previous internship experience in hardware or low-level software engineering
  • Experience with C, C++, or Python
  • Passion for solving complex problems and ability to draw upon knowledge and experience from a variety of technical areas to produce extremely high-performance solutions
  • Reliable and predictable availability

Also Helpful, but Not Required:
  • lowRISC or RISC-V
  • CocoTB, Chisel, Opencore, or Bluespec
  • HLS or OpenCL
  • Any programming close to the metal with CPU, GPU, microprocessors, etc.
  • Linux kernel and driver programming
  • Robotics, Telecommunications, or High Speed Networking
  • Raspberry Pi or Arduino
  • Excellent marks in courses such as computer architecture, digital design, design verification

* No finance or economics study or work experience required
INTERNATIONAL STUDENTS are encouraged to apply. We accept students eligible for CPT/OPT and we sponsor work visas for full-time positions.
The estimated base salary for this role is $250,000 per year.

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