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Freelance Physical Design Engineer Jobs (NOW HIRING)

Mirafra Technology

Physical Design Engineer

San Diego, CA

$144K - $148K/yr

Job Overview: The Graphics team is looking for Experienced Physical Design Engineers to work on Adreno Graphics cores in the area of Physical Implementation. Responsibilities: The Physical ...

Xforia, Inc.

Physical Design Engineer

Sunnyvale, CA · On-site

$162K - $166K/yr

Physical Design Engineer Location: Sunnyvale, CA Note: Highlighted skills are must to have. JD: • 10+ years of hands-on experience for block level Implementation activities(Netlist to GDS II and ...

Etched

Physical Design Engineer

San Jose, CA · On-site

$150K - $275K/yr

Job Summary Etched is looking for exceptional Physical Design engineers to join our team. In this role, you will own block-level implementation and verification, drive timing closure and PPA ...

Apply Early

Etched

Physical Design Engineer

San Jose, CA · On-site

$150K - $275K/yr

Job Summary Etched is looking for exceptional Physical Design engineers to join our team. In this role, you will own block-level implementation and verification, drive timing closure and PPA ...

Hudson River Trading

Physical Design Engineer

Austin, TX · On-site

$134K - $138K/yr

Hudson River Trading (HRT) is seeking a Physical Design Engineer with a broad, versatile skillset to join our growing Hardware team. In this role, you will help deliver performance-critical ASICs and ...

Nvidia Corporation

Physical Design Engineer

Westford, MA · On-site

$141K - $145K/yr

NVIDIA is looking for best-in-class Senior Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high speed communication devices ...

OpenAI

Physical Design Engineer

San Francisco, CA · On-site

$266K - $445K/yr

About the Role We are seeking a highly skilled Physical Design Engineer with deep expertise in physical design and methodology. This individual contributor role sits within our physical design team ...

Nvidia

Physical Design Engineer

Westford, MA

$141K - $145K/yr

NVIDIA is looking for best-in-class Senior Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high speed communication devices ...

Mirafra Technology

Physical Design Engineer

San Diego, CA

$144K - $148K/yr

Physical Design Engineer Location : San Diego,CA Type : Full Time Job Overview: To do Floor planning, P&R, timing closure SI prevention/fixing, power planning, CTS, PV and I/R drop for Block as well ...

Noralogic Inc

Physical Design Engineer

Hillsboro, OR · On-site

$148K - $152K/yr

Physical Design Engineer Job Location: Hillsboro, OR Job Type: Fulltime In this position, you will be developing and supporting mixed signal and custom digital hard IPs. The job will entail: files ...

Noralogic Inc

Physical Design Engineer

Hillsboro, OR · On-site

$148K - $152K/yr

Physical Design Engineer Job Location: Hillsboro, OR Job Type: Fulltime In this position, you will be developing and supporting mixed signal and custom digital hard IPs. The job will entail: files ...

Broadcom, Inc.

Physical Design Engineer

San Jose, CA · On-site

$141K - $226K/yr

Broadcom is searching for an ASIC top level floorplan Physical Design Engineer to join the Asic Products Division. This position involves working with the latest technology to continue driving next ...

Broadcom

Physical Design Engineer

San Jose, CA

$141K - $226K/yr

Broadcom is searching for an ASIC top level floorplan Physical Design Engineer to join the Asic Products Division. This position involves working with the latest technology to continue driving next ...

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Freelance Physical Design Engineer information

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How much do freelance physical design engineer jobs pay per hour?

As of Jul 6, 2026, the average hourly pay for freelance physical design engineer in the United States is $47.71, according to ZipRecruiter salary data. Most workers in this role earn between $24.28 and $61.78 per hour, depending on experience, location, and employer.

What is the difference between Freelance Physical Design Engineer vs Full-Time Physical Design Engineer?

AspectFreelance Physical Design EngineerFull-Time Physical Design Engineer
CredentialsTypically requires a relevant degree and industry experience; certifications are optionalRequires a degree and often certifications or ongoing training
Work EnvironmentIndependent, project-based, remote or on-siteCompany office or dedicated team environment
Employer & Industry UsageHired by multiple clients across various companies; flexible engagementsEmployed by a single company; stable employment
Work ScopeSpecific projects, often short-termOngoing responsibilities within a team or department

The main difference between a Freelance Physical Design Engineer and a Full-Time Physical Design Engineer lies in employment type, work environment, and project scope. Freelancers work independently on short-term projects for multiple clients, offering flexibility. Full-time engineers are employed by a single company, focusing on continuous, long-term responsibilities within a team.

What are Freelance Physical Design Engineers?

Freelance Physical Design Engineers are specialized professionals who work independently, often on a contract basis, to design and implement the physical layout of integrated circuits (ICs) and chips. They are responsible for taking a digital circuit design and transforming it into a manufacturable physical layout, which includes tasks such as floorplanning, placement, routing, timing analysis, and verification. These engineers typically use electronic design automation (EDA) tools and collaborate remotely with semiconductor companies, startups, or design teams. Freelance Physical Design Engineers offer flexibility and specialized expertise for projects without requiring long-term employment commitments.

What are the key skills and qualifications needed to thrive as a Freelance Physical Design Engineer, and why are they important?

To thrive as a Freelance Physical Design Engineer, you need expertise in ASIC/FPGA physical design, knowledge of VLSI concepts, and a degree in electrical or electronics engineering. Familiarity with EDA tools such as Cadence, Synopsys, or Mentor Graphics, and experience with scripting languages like TCL or Python are typically required. Strong problem-solving, communication, and time management skills help freelancers efficiently collaborate with clients and meet project deadlines. These skills and qualities are vital for delivering high-quality chip designs and succeeding in a competitive, project-based environment.

What are some common challenges faced by freelance physical design engineers, and how can they be addressed?

Freelance physical design engineers often encounter challenges such as limited access to advanced EDA tools, variable project scopes, and the need to quickly adapt to different clients' design methodologies. To address these, it’s important to invest in personal tool licenses or partner with clients who provide access, maintain a strong network to secure consistent projects, and stay updated on industry trends and technologies. Effective communication and documentation also help ensure alignment with client expectations and avoid misunderstandings during the project lifecycle.
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What are the most commonly searched types of Physical Design Engineer jobs? The most popular types of Physical Design Engineer jobs are:
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Freelance Physical Design Engineer jobs near you
Infographic showing various Freelance Physical Design Engineer job openings in the United States as of June 2026, with employment types broken down into 96% Full Time, and 4% Contract. Highlights an 98% Physical, 1% Hybrid, and 1% Remote job distribution, with an average salary of $99,230 per year, or $47.7 per hour.

Physical Design Engineer

Mirafra Technology

San Diego, CA

$144K - $148K/yr

Full-time

Posted 24 days ago

Job description

Company Description

Mirafra is a global product engineering services company with expertise in semiconductor design, embedded and application software.

Job Description

Job Overview:
The Graphics team is looking for Experienced Physical Design Engineers to work on Adreno Graphics cores in the area of Physical Implementation.
Responsibilities:
The Physical Implementation Engineer will work in Qualcomms Adreno GPU team and will be responsible for all the P&R experiments targeted at validating new flows/methodologies.

Minimum Qualifications:
Able to deal with MSM Top level complexity from FP, Placement, CTS, Routing and timing closure Must be
able to take the Hardmacro through P&R from Netlist to GDS including timing closure, formal and Physical verification.

Tools: EDA Physical design tools experience ( Examples: Cadence Innovas, Synopsys ICC2,  PrimetimeSi/Calibre/ etc)


Skills:

Physical design implementation expertize in latest technology nodes in one of the below domains or all of these.


1.Floor planning at Full chip level or Macro or Block Level

a.Macro placement, power grid implementation, power routing, special routing like analog signals etc

b.Power collapse/Low power implementation flow

2.P&R:
Place and route at chip level or block level, perform placement, timing closure in P&R mode, perform clock tree synthesis , routing etc

3.Timing closure/STA

a.Perform STA using primetime Si or Tempus or any industry standard STA engine, timing closure, ECO generation, timing correlation

b.Deep understanding of timing skills to perform correlation, timing fixes , corner/voltage definetions etc

4.Clock Tree Synthesis:

a.Perform custom or regular clock tree implementation at block level or top level.

b.Clock tree balance of complicated tree, clock power reduction techniques etc

5.Low Power Implementation

a.Power collapse/power gaing techniques/implementation

b.UPF/CPF flow knowledge

c.CLP/FV

6. Physical Verification Using Calibre a.Running all the PV checks (DRc/LVS/ERC/Softcheck ) and deep understanding of all the rules and fixes
7. Perl/Python/Shell script experience is also preferred to help with automation


Additional Information

All your information will be kept confidential according to EEO guidelines.

Apply