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Design Verification Jobs (NOW HIRING)

Scadea Solutions Inc

Design verification Engineer

Allentown, PA · On-site

$134.20K - $163.80K/yr

Role- Design verification Engineer Location - Allentown, PA Duration - Full-time Visa Status - US Citizen / Green Card Description: As a design verification engineer, you will be responsible for ...

Mythic

Design Verification Engineer

Palo Alto, CA · On-site

$120K - $225K/yr

We're hiring experienced Design Verification Engineers from junior to senior levels to play a key role in developing and verifying the designs that will bring our next-generation AI processors to ...

Quest Global

Design Verification Engineer

San Diego, CA · On-site

$160K - $180K/yr

Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage * Debug, root-cause and resolve functional failures in the design, partnering ...

Quest Global

Design Verification Engineer

Santa Clara, CA · Remote

$160K - $180K/yr

Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage * Debug, root-cause and resolve functional failures in the design, partnering ...

Baidu USA

Design Verification Engineer

Sunnyvale, CA · On-site

$159.60K - $194.80K/yr

Description We are looking for an experienced design verification engineer to join our SoC team at Baidu's Sunnyvale office. The successful candidate will be a motivated self-starter who will thrive ...

Apple

Design Verification Lead

Austin, TX

$134.80K - $164.50K/yr

We are seeking a Senior Engineering Leader - in the area of Silicon Design Verification to lead one or more high-caliber verification teams in developing cutting-edge silicon IPs. In this role, you ...

Correct Designs

Design Verification Engineer

Austin, TX · On-site

$134.80K - $164.50K/yr

Design Verification Engineer Looking for new challenges? Would you like the variety of a contract position along with long term stability and benefits? Correct Designs can give it all to you. Correct ...

Redolent, Inc.

Design Verification Engineer

Santa Clara, CA · On-site

$159.70K - $195K/yr

We are seeking a skilled Design Verification Engineer to join our hardware engineering team. The ideal candidate will be responsible for verifying complex digital designs using advanced verification ...

Correct Designs

Design Verification Engineer

Austin, TX · On-site

$134.80K - $164.50K/yr

Design Verification Engineer Looking for new challenges? Would you like the variety of a contract position along with long term stability and benefits? Correct Designs can give it all to you. Correct ...

Cirrus Logic

Design Verification Engineer

Chandler, AZ · On-site

$133.90K - $163.50K/yr

We are seeking an experienced and innovative Design Verification Engineer to join a world-class silicon design verification team. This role partners closely with digital and analog designers, systems ...

Apple

Design Verification Lead

Austin, TX · On-site

$134.80K - $164.50K/yr

We are seeking a Senior Engineering Leader - in the area of Silicon Design Verification to lead one or more high-caliber verification teams in developing cutting-edge silicon IPs. In this role, you ...

Baidu USA

Design Verification Engineer

Sunnyvale, CA · On-site

$159.60K - $194.80K/yr

Description We are looking for an experienced design verification engineer to join our SoC team at Baidu's Sunnyvale office. The successful candidate will be a motivated self-starter who will thrive ...

Inherent Technologies

Design Verification

Chandler, AZ · Remote

$139.20K - $169.90K/yr

Experience with flow optimizations such as Grey/Black-boxing techniques Good at communicating requirements/issues with Implementation, PnR and Design teams. Working knowledge of Confluence ...

Mirafra Technology

Design Verification Engineer

San Diego, CA

$144.40K - $176.20K/yr

Design Verification Engineer Job Type : Full time Location : San Diego And Bay Area : Strong verification skills: test planning, problem solving, debug, adversarial testing. Multimedia Camera Image ...

TylSemi

Design Verification Architect

San Jose, CA · On-site

$150K - $300K/yr

Role Overview We are seeking a highly experienced Design Verification Architect to lead the definition and execution of scalable, reusable, and high-quality verification strategies for next ...

Glow Networks

SOC Design Verification Engineer

Dallas, TX · On-site

$127.80K - $156K/yr

SOC Design Verification Engineer Location: Redmond, WA (Onsite) Duration: 10 Months Minimum Qualifications • Track record of 'first-pass success' in ASIC development cycles. • Bachelor's degree ...

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Design Verification information

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$105.5K

$149.2K

$167K

How much do design verification jobs pay per year?

As of May 30, 2026, the average yearly pay for design verification in the United States is $149,150.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $166,000.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as a Design Verification Engineer, and why are they important?

To thrive as a Design Verification Engineer, you need a solid background in digital design, verification methodologies, and programming languages like SystemVerilog, typically supported by a degree in electrical engineering or a related field. Familiarity with verification tools such as UVM, simulation environments, and EDA software is essential, along with knowledge of scripting languages like Python or Perl. Strong analytical thinking, attention to detail, and effective teamwork are standout soft skills in this role. These skills ensure accurate validation of complex hardware designs, reducing errors and supporting reliable product development cycles.

What are some common challenges faced by Design Verification engineers, and how can they be addressed?

Design Verification engineers often encounter challenges such as managing complex testbenches, debugging intricate corner cases, and ensuring coverage completeness within tight project timelines. To address these, it’s important to have strong scripting skills, collaborate closely with design and validation teams, and make effective use of verification methodologies like UVM. Regular communication and review cycles also help catch issues early and improve overall verification quality.

What are design verification engineers?

Design verification engineers are professionals who ensure that hardware or software designs meet their intended specifications and function correctly before production or release. They develop and execute tests, write verification plans, create simulation environments, and identify design flaws or errors. Their work is critical in industries like semiconductor, electronics, and software development to prevent costly mistakes and ensure high-quality products. Design verification engineers often work closely with design and validation teams throughout the product development lifecycle.

What is the difference between Design Verification vs Design Validation?

AspectDesign VerificationDesign Validation
PurposeEnsures the design meets specified requirements through testing and analysisConfirms the final product fulfills user needs and intended use
TimingDuring the development phaseAfter the product is developed and before release
MethodsInspections, reviews, testing, analysisUser testing, field trials, real-world testing
FocusDesign correctness and complianceProduct effectiveness and user satisfaction

While Design Verification checks if the design meets specified requirements during development, Design Validation ensures the final product performs effectively in real-world conditions. Both are essential steps in the product development process to deliver a reliable and user-centered product.

More about Design Verification jobs
What cities are hiring for Design Verification jobs? Cities with the most Design Verification job openings:
What are the most commonly searched types of Design Verification jobs? The most popular types of Design Verification jobs are:
What states have the most Design Verification jobs? States with the most job openings for Design Verification jobs include:
What job categories do people searching Design Verification jobs look for? The top searched job categories for Design Verification jobs are:
Design Verification jobs near you
Infographic showing various Design Verification job openings in the United States as of May 2026, with employment types broken down into 1% Internship, 1% As Needed, 57% Full Time, 27% Part Time, 1% Temporary, and 13% Contract. Highlights an 81% Physical, 16% Hybrid, and 3% Remote job distribution, with an average salary of $149,150 per year, or $71.7 per hour.
Design Verification Lead Engineer

Design Verification Lead Engineer

Cadence Design Systems Inc.

Austin, TX

$134.80K - $164.50K/yr

Full-time

Posted 17 days ago

Job description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Design Verification Lead Engineer

Role Overview:
The Lead DV Engineer focuses on the execution and technical management of verification projects. You will lead a focused team to ensure comprehensive test coverage and closure for specificCPU cores or processor blocks.

Key Responsibilities:

  • Technical Execution:Developing and executing detailed verification plans (vPlans) usingCadence vManager.
  • Environment Development:Develop UVM scoreboards, monitors, and complex functional coverage models for multi-protocol or processor-specific interfaces.
  • Debug & Triage:Lead the debug of complex RTL failures and coordinate with design engineers to resolve microarchitectural bugs.
  • Regression Management:Manage automated regression environments (e.g., Jenkins) and ensure targets for code and functional coverage are met.
  • Project Tracking:Responsible for technical alignment, project planning, and progress tracking for the verification lifecycle.

Required Qualifications:

  • B.S/M.S in EEE with 5-8+ years of hands-on experience in VLSI design verification.
  • Strong command ofSystemVerilog Assertions (SVA), constraint randomization, and UVM.
  • Experience with processor integration (e.g., RISC-V or ARM) and industry-standard protocols like AMBA/PCIe.
  • Expertise in scripting (Perl, Python, or Tcl) for verification flow automation.
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