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Power Management Ic Design Jobs (NOW HIRING)

Texas Instruments

Analog IC Design Engineer

Dallas, TX · On-site

Lead design reviews and produce thorough design and product documentation * Direct IC layout to ... Knowledge of power management topologies (buck, boost, flyback, LDO, charge pump) * Scripting ...

Power Integrations

Head of IC Design

San Jose, CA · On-site

$181K - $223K/yr

... management o Design reuse o Continuous improvement • Recruit, develop, and retain top engineering talent. Ideal Profile • 15+ years of experience in IC design (analog, mixed-signal, or power ICs ...

Power Integrations

Head of IC Design

San Jose, CA · On-site

$181K - $223K/yr

... management o Design reuse o Continuous improvement • Recruit, develop, and retain top engineering talent. Ideal Profile • 15+ years of experience in IC design (analog, mixed-signal, or power ICs ...

Power Integrations

Head of IC Design

San Jose, CA · On-site

$181K - $223K/yr

... Risk management o Design reuse o Continuous improvement Recruit, develop, and retain top engineering talent. Ideal Profile 15+ years of experience in IC design (analog, mixed-signal, or power ICs)

Power Integrations

Head of IC Design

San Jose, CA · On-site

$181K - $223K/yr

... management o Design reuse o Continuous improvement • Recruit, develop, and retain top engineering talent. Ideal Profile • 15+ years of experience in IC design (analog, mixed-signal, or power ICs ...

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Power Management Ic Design information

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$53.5K

$116K

$149.5K

How much do power management ic design jobs pay per year?

As of Jul 11, 2026, the average yearly pay for power management ic design in the United States is $116,016.00, according to ZipRecruiter salary data. Most workers in this role earn between $116,500.00 and $116,500.00 per year, depending on experience, location, and employer.

What is a Power Management IC Design job?

A Power Management IC (PMIC) Design job involves designing integrated circuits that regulate and distribute power efficiently in electronic devices. Engineers in this role develop circuits for voltage regulation, power conversion, and battery management while optimizing performance and minimizing power loss. They work with semiconductor technologies, simulation tools, and testing methodologies to ensure reliability and efficiency. PMIC designers collaborate with system architects and layout engineers to meet the power requirements of applications like smartphones, IoT devices, and automotive systems.

What are the key skills and qualifications needed to thrive in the Power Management Ic Design position, and why are they important?

Success in Power Management IC Design requires a strong background in analog and mixed-signal circuit design, semiconductor device physics, and a relevant degree in electrical or electronics engineering. Familiarity with EDA tools like Cadence or Synopsys, experience in silicon validation, and sometimes certifications in low-power design techniques are highly valued. Excellent problem-solving skills, attention to detail, and effective teamwork are important soft skills that distinguish top designers. Mastery of these abilities ensures high-performance, reliable power solutions in increasingly complex electronic systems.

What does a typical day look like for a Power Management IC Design engineer?

A typical day for a Power Management IC Design engineer involves designing, simulating, and verifying integrated circuits dedicated to efficient power conversion and regulation. You’ll frequently collaborate with cross-functional teams such as layout, digital design, and test engineering, ensuring your designs are robust and manufacturable. Tasks may include schematic capture, design reviews, debugging silicon prototypes, and interacting with customers or product managers to meet project requirements. The role offers a dynamic blend of hands-on technical work and collaborative problem-solving, making each day both challenging and rewarding for those passionate about electronics innovation.

More about Power Management Ic Design jobs
What cities are hiring for Power Management Ic Design jobs? Cities with the most Power Management Ic Design job openings:
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Power Management Ic Design jobs near you
Infographic showing various Power Management Ic Design job openings in the United States as of July 2026, with employment types broken down into 89% Full Time, 8% Part Time, and 3% Contract. Highlights an 87% Physical, 3% Hybrid, and 10% Remote job distribution, with an average salary of $116,016 per year, or $55.8 per hour.
Principal Design Engineer

Principal Design Engineer

Navitas Semiconductor

Torrance, CA • On-site

$190K - $230K/yr

Full-time

Re-posted 2 days ago

Job description

Job Description:
Title: Principal Design Engineer (Principal Analog IC Designer)
Reports to: VP of IC Design
In Office
Exempt
Based: Torrance, CA - Corporate Office
Job Purpose:
Navitas Semiconductor is a publicly traded MNC that creates the world's fasted integrated GaN Power ICs. Design Engineers will design, implement, and verify power IC through transistor level to top-level for a myriad of PMIC products.
Key Responsibilities and Duties:
  • Evaluate system-level trade-offs for next generation power supply and identify IC architectures in collaboration with the system application team to meet performance requirements
  • Interface with characterization, modeling, and EDA design engineers to define and optimize device characteristics and simulation needs
  • Guide layout engineers on physical design
  • Review layouts and floorplan and provide feedback for optimal layout design
  • Tape out designs on schedule, adhering to required specifications
  • Evaluate and validate designs in the lab and identify any deviations from requirements and implement corrective actions
  • Any and all other duties, as assigned

KSAOs:
  • Knowledge and strong understanding of semiconductor device physics, device safe-operating area, and power transistors used for high-frequency switching
  • Proven track record of designing power IC from concept phase to massive production
  • Strong proficiency with EDA tools (Cadence Specter, Virtuoso XL, Post Parasitic Extraction simulations, Monte Carlo Analysis, etc.)
  • Experience with DFT approaches and development of characterization and production test plans
  • Professionalism towards internal and external partners
  • Demonstrated ability to autonomously manage a myriad of demands and prioritize effectively
  • Excellent written and verbal communication skills
  • Maintains accountability for actions (ownership of work)
  • Extremely reliable and self-motivated with the ability to champion tasks

Requirements:
  • Master's degree in electrical engineering and 10+ years' experience OR
  • PhD in electrical engineering and 7+ years' experience
  • Extensive previous experience in chip design in the power supply field (Analog IC Design, Power Management IC, PMIC, AC-DC, AC-DC Controller, ACF, LLC, QR)

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