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Power Management Ic Design Jobs (NOW HIRING)

Head of IC Design

San Jose, CA · On-site

$181K - $223K/yr

... management o Design reuse o Continuous improvement • Recruit, develop, and retain top engineering talent. Ideal Profile • 15+ years of experience in IC design (analog, mixed-signal, or power ICs ...

Balancing power vs performance * ESD protection * Design for manufacturability and reliability The Tools The IC Design Engineer will primarily use Cadence tools (Virtuoso, AMS, SpectreRF, Explorer ...

Digital IC Design Engineer

Aliso Viejo, CA · On-site

$145K/yr

As a Digital IC Design Engineer you will be responsible for managing and executing activities ... power management. * Drive and/or support the implementation of innovative security features for ...

... power the systems end users depend on every day. From proof-of-concept to execution in the real ... The Analog IC Design Engineer will be a key member in the Advanced Imaging Group, will work with ...

Analog IC Design Engineer

Princeton, NJ · On-site

$104K - $137K/yr

... power the systems end users depend on every day. From proof-of-concept to execution in the real ... The Analog IC Design Engineer will be a key member in the Advanced Imaging Group, will work with ...

... power the systems end users depend on every day. From proof-of-concept to execution in the real ... The Analog IC Design Engineer will be a key member in the Advanced Imaging Group, will work with ...

This is a player-coach leadership position: the Design Director combines deep hands-on analog/power IC design expertise with proven design management capability to deliver first-pass silicon success ...

This is a player-coach leadership position: the Design Director combines deep hands-on analog/power IC design expertise with proven design management capability to deliver first-pass silicon success ...

Staff Analog Design Engineer

Chandler, AZ · On-site

$198K/yr

Design and develop analog and mixed-signal IC blocks from concept through production, including data converters, power management, amplifiers, and supporting circuitry in advanced CMOS processes.

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Power Management Ic Design information

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$53.5K

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How much do power management ic design jobs pay per year?

As of Jul 13, 2026, the average yearly pay for power management ic design in the United States is $116,016.00, according to ZipRecruiter salary data. Most workers in this role earn between $116,500.00 and $116,500.00 per year, depending on experience, location, and employer.

What is a Power Management IC Design job?

A Power Management IC (PMIC) Design job involves designing integrated circuits that regulate and distribute power efficiently in electronic devices. Engineers in this role develop circuits for voltage regulation, power conversion, and battery management while optimizing performance and minimizing power loss. They work with semiconductor technologies, simulation tools, and testing methodologies to ensure reliability and efficiency. PMIC designers collaborate with system architects and layout engineers to meet the power requirements of applications like smartphones, IoT devices, and automotive systems.

What are the key skills and qualifications needed to thrive in the Power Management Ic Design position, and why are they important?

Success in Power Management IC Design requires a strong background in analog and mixed-signal circuit design, semiconductor device physics, and a relevant degree in electrical or electronics engineering. Familiarity with EDA tools like Cadence or Synopsys, experience in silicon validation, and sometimes certifications in low-power design techniques are highly valued. Excellent problem-solving skills, attention to detail, and effective teamwork are important soft skills that distinguish top designers. Mastery of these abilities ensures high-performance, reliable power solutions in increasingly complex electronic systems.

What does a typical day look like for a Power Management IC Design engineer?

A typical day for a Power Management IC Design engineer involves designing, simulating, and verifying integrated circuits dedicated to efficient power conversion and regulation. You’ll frequently collaborate with cross-functional teams such as layout, digital design, and test engineering, ensuring your designs are robust and manufacturable. Tasks may include schematic capture, design reviews, debugging silicon prototypes, and interacting with customers or product managers to meet project requirements. The role offers a dynamic blend of hands-on technical work and collaborative problem-solving, making each day both challenging and rewarding for those passionate about electronics innovation.

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What cities are hiring for Power Management Ic Design jobs? Cities with the most Power Management Ic Design job openings:
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Infographic showing various Power Management Ic Design job openings in the United States as of July 2026, with employment types broken down into 89% Full Time, 8% Part Time, and 3% Contract. Highlights an 87% Physical, 3% Hybrid, and 10% Remote job distribution, with an average salary of $116,016 per year, or $55.8 per hour.

Principal /Sr Principal PMIC Analog Designer-Chandler,Arizona

NXP Semiconductors N.V.

Nogales, AZ • On-site

Full-time

Re-posted 3 days ago


Job description

Job Responsibility:
  • Architect, model, and define sub-system specifications for advanced power management solutions, including: DC-DC converters (inductive and capacitive), LDOs, shunt regulators, and multi-rail PMIC architectures
  • Translate system-level specifications into elegant, robust, and cost-effective silicon solutions Lead end-to-end design of power management circuits, including: High-current power stages and advanced packaging-aware design, Loop stability, transient performance, and efficiency optimization
  • Define architecture and provide detailed design specifications to global teams; lead and mentor junior design engineers
  • Develop system and behavioral models (MATLAB/Simulink, Verilog-A/AMS) to validate architecture, loop stability, and system performance
  • Drive and participate in critical design reviews and ensure design quality, robustness, and manufacturability
  • Serve as the PMIC technical lead and primary interface to Tier-1 customers, driving technical discussions and alignment
  • Collaborate cross-functionally with system, layout, product, test, packaging, and quality teams to ensure successful product execution
  • Provide technical leadership for innovation strategy, including proposing and reviewing long-term roadmap and new architectures
  • Drive differentiated innovation and contribute to patentable solutions for next-generation power management products

Job Qualification:
  • MS in Electrical Engineering with 12+ years of experience, or PhD with 10+ years of experience in power management IC development
  • Proven expertise in power conversion topologies: Buck, boost, buck-boost, charge pumps, LDOs, and multi-phase architectures
  • Strong understanding of control techniques: Current-mode, voltage-mode, hysteretic control, and loop compensation
  • Deep experience in high-current power stage design, including advanced packaging and parasitic-aware design
  • Expertise in power integrity modeling and analysis (frequency/time domain), simulation optimization, and silicon correlation
  • Strong foundation in analog design, control theory, and device physics
  • Demonstrated ability to develop novel architectures and drive innovation, including patent generation
  • Hands-on experience with Cadence IC design tools (Virtuoso, Spectre) and modeling environments (MATLAB/Simulink)
  • Proven track record of delivering products from concept to high-volume manufacturing
  • Excellent communication skills and experience working with global cross-functional teams and Tier-1 customers

More information about NXP in the United States...
NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals.
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