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Design Verification Engineer Jobs in Oregon (NOW HIRING)

CPU Verification Engineer

Hillsboro, OR · On-site

$148K/yr

The Role and Impact As a CPU Design Verification Engineer , you'll play a pivotal role in ensuring the functional correctness and performance of Intel's ATOM processor family. Working alongside world ...

The complexity of the clocks and resets design has increased many folds. This requires ... Hands on experience in object-oriented programming * Prior design or verification experience at the ...

As part of our Silicon Technologies group, you'll help design and manufacture our next-generation ... Description As a formal verification engineer working the complete formal verification for single ...

The Role and Impact As a CPU Pre-Silicon Verification Engineer , you will help ensure the quality ... Working across architecture, design, verification, and platform teams, you will identify and ...

The complexity of the clocks and resets design has increased many folds. This requires ... verification process Hands on experience in object-oriented programming Prior design or ...

Director, SoC Design Engineering

Hillsboro, OR · On-site

$148K - $180K/yr

The Role and Impact We are seeking a highly experienced a Director, SoC Design Engineering, to lead the functional verification efforts for cutting-edge system-on-chip (SoC) designs. In this ...

Emulation Verification Engineer

Beaverton, OR · On-site

$141K - $172K/yr

We are looking for you to join our design verification team focusing on the creation, deployment, and support of sophisticated emulation environments. In this highly transparent role, you will be at ...

Emulation Verification Engineer

Beaverton, OR · On-site

$141K - $172K/yr

We are looking for you to join our design verification team focusing on the creation, deployment, and support of sophisticated emulation environments. In this highly transparent role, you will be at ...

Emulation Verification Engineer

Beaverton, OR · On-site

$141K - $172K/yr

We are looking for you to join our design verification team focusing on the creation, deployment, and support of sophisticated emulation environments. In this highly transparent role, you will be at ...

Emulation Verification Engineer

Beaverton, OR · On-site

$141K - $172K/yr

We are looking for you to join our design verification team focusing on the creation, deployment, and support of sophisticated emulation environments. In this highly transparent role, you will be at ...

Showing results 41-60

Design Verification Engineer information

See Oregon salary details

$111.5K

$157.7K

$176.6K

How much do design verification engineer jobs pay per year?

As of Sep 8, 2026, the average yearly pay for design verification engineer in Oregon is $157,694.00, according to ZipRecruiter salary data. Most workers in this role earn between $143,800.00 and $175,500.00 per year, depending on experience, location, and employer.

What is a design verification engineer?

A Design Verification Engineer ensures that hardware designs function correctly by developing and executing test plans, writing verification code (often in SystemVerilog with UVM), and debugging design issues. They work closely with design and validation teams to confirm specifications are met before manufacturing. Their role is critical in preventing costly design flaws and ensuring high-quality semiconductor products.

What skills and qualifications are needed to be a design verification engineer?

Design Verification Engineers require a solid background in digital design concepts, computer engineering, and electrical engineering, usually supported by a relevant bachelor’s or master’s degree. Expertise with hardware description languages like Verilog or VHDL, simulation tools, and familiarity with Unix/Linux environments are typical technical requirements, with certifications in FPGA/ASIC design considered advantageous. Strong analytical thinking, problem-solving skills, teamwork, and effective communication help these engineers collaborate closely with design, validation, and development teams. These competencies are vital to ensuring design correctness, catching flaws early, and driving efficient, reliable hardware development.

What are the most common challenges faced by design verification engineers in their daily work?

Design Verification Engineers often face the challenge of thoroughly validating complex digital designs within tight project deadlines. Debugging intricate issues, dealing with evolving specifications, and ensuring complete coverage during simulation can require a great deal of attention to detail and persistence. Collaboration with designers, validation teams, and often cross-functional groups is critical to resolving ambiguities and preventing errors from reaching production. Adapting to new verification methodologies or tools is also common as technologies and standards advance. These challenges offer valuable learning opportunities and play a crucial role in producing robust, high-quality hardware products.

What are the most commonly searched types of Design Verification Engineer jobs in Oregon?

The most popular types of Design Verification Engineer jobs in Oregon are:

What job categories do people searching Design Verification Engineer jobs in Oregon look for?

The top searched job categories for Design Verification Engineer jobs in Oregon are:

What cities in Oregon are hiring for Design Verification Engineer jobs?

Cities in Oregon with the most Design Verification Engineer job openings:

What are popular job titles related to Design Verification Engineer jobs in OR?

For Design Verification Engineer jobs in OR, the most frequently searched job titles are:

Infographic showing various Design Verification Engineer job openings in Oregon as of August 2026, with employment types broken down into 85% Full Time, 12% Part Time, and 3% Contract. Highlights an 82% Physical, 5% Hybrid, and 13% Remote job distribution, with an average salary of $157,694 per year, or $75.8 per hour.

Senior Design Verification Engineer - Neuromorphic Computing

Hillsboro, OR • On-site

Intel
Manufacturing • 10K+ employees

$122K - $232K/yr

Full-time

Medical, Retirement, PTO

Posted 7 days ago


Key responsibilities

  • Develop and scale verification methodologies spanning software, RTL, and emulation platforms to validate neuromorphic architectures.

  • Create application-driven workloads using high-level software APIs and develop HDL-based verification environments to ensure hardware correctness.

  • Map application-level requirements to unit- and system-level test plans, run regressions, debug test failures, and work with designers to improve coverage.


Intel rating

8.7

Company rating: 8.7 out of 10

Based on 147 frontline employees who took The Breakroom Quiz

18th of 161 rated electronics manufacturers


Job description

Job Details:Job Description: 

The Opportunity
For nearly a decade, Intel's Neuromorphic Computing Lab-together with a global ecosystem of 250+ research groups-has explored architectures, algorithms, and software inspired by the brain's extraordinary efficiency, scalability, and adaptability. Our Loihi series of research chips pioneered event-driven, sparse, and massively parallel neuro-inspired processing, fueling over 100 peer-reviewed publications that validate the promise of this novel approach.
Now, we're entering an exciting new chapter: transforming these breakthroughs into real-world products that will power the coming era of physical AI systems-beyond the reach of GPUs and mainstream AI accelerators.
If you are passionate about pushing the boundaries of computing, from transistor-level innovation to software abstractions, join us. Help define the next wave of AI technology that harnesses the proven advantages of Intel's neuromorphic computing technology with the versatility demanded by modern AI workloads.
Position Overview
We are seeking experienced pre-silicon verification engineers who are passionate about driving innovation at the intersection of advanced semiconductor technologies, physical AI and next-generation computing architectures. As a member of Intel's neuromorphic silicon team, you will develop and scale verification methodologies spanning software, RTL, and emulation platforms to validate these novel architectures.
This role requires a full-stack verification mindset. You will create application-driven workloads using high-level software APIs while also developing robust HDL-based verification environments that ensure correctness at the lowest levels of hardware implementation. Working closely with architecture, design, and software teams, you will help drive verification strategies that enable first-pass silicon success.
An openness to learning new technologies and methodologies, such as asynchronous design techniques and AI-driven verification automation, is essential.
Responsibilities
Mapping application-level requirements to unit- and system-level test plans.
Write Python-based directed and random tests for design partitions and chip-level.
Running regressions, debugging test failures, tracking coverage and working with designers to fix failures and improve coverage.
Maintaining assertions, scoreboards and any tools/flows that are developed.
Integrating VIPs and coordinating with IP teams to ensure protocol requirements are met.

Qualifications:

Minimum qualifications
Bachelors and 5+ years OR Masters and 3+ years of silicon engineering experience.
3+ years of pre-silicon verification or post-silicon validation experience in SoC accelerators or custom ASIC designs.
3+ years of experience in UVM and constrained random verification methods.
2+ years of experience developing the entire verification stack from test planning to execution, e.g. covering test development, coverage tracking, emulation, and post-silicon.
1+ year of experience using AI tools for test generation, debugging and improving overall productivity.
Preferred qualifications
Experienced in neuromorphic computing or AI/ML accelerator design.
Experience with commercial Verification IPs for standard IO interfaces, PHYs, and protocols such as Ethernet, PCIE, MACsec/IPsec, RoCEv2, MIPI CSI-2, JESD204.
Experience with DFX, low power and UPF verification techniques.

Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Oregon, HillsboroAdditional Locations:US, Arizona, Phoenix, US, California, Folsom, US, California, Santa Clara, US, Texas, AustinPosting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $122,440.00-232,190.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

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About Intel

Sourced by ZipRecruiter

Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth

Industry

Manufacturing

Company size

10,000+ Employees

Headquarters location

Santa Clara, CA, US

Year founded

1968