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Contract Asic Design Engineer Jobs (NOW HIRING)

ASIC Design Engineer

Austin, TX · On-site

$130 - $210/hr

We're looking for ASIC design engineers to contribute to and own blocks in the development of the A-0 and A-1 wafer products, across both the XPU, memory chiplet and other dies on the wafer. Ideal ...

ASIC Design Engineer

Boston, MA · On-site

$130 - $210/hr

We're looking for ASIC design engineers to contribute to and own blocks in the development of the A-0 and A-1 wafer products, across both the XPU, memory chiplet and other dies on the wafer. Ideal ...

ASIC Design Engineer

San Francisco, CA · On-site

$130 - $210/hr

We're looking for ASIC design engineers to contribute to and own blocks in the development of the A-0 and A-1 wafer products, across both the XPU, memory chiplet and other dies on the wafer. Ideal ...

ASIC Design Engineer

San Diego, CA · On-site

$99 - $148/hr

Qualcomm is seeking talented ASIC Design Engineers to join our growing SoC and ASIC Design organization. Successful candidates will have the opportunity to contribute across a variety of projects ...

ASIC Design Engineer

San Diego, CA · On-site

$99 - $148/hr

Qualcomm is seeking talented ASIC Design Engineers to join our growing SoC and ASIC Design organization. Successful candidates will have the opportunity to contribute across a variety of projects ...

ASIC Design Engineer

Alameda, CA · On-site

$120 - $180/hr

The Role We're looking for an ASIC Design Engineer who wants to be involved in all aspects of design cycle: documentation, design, pre-silicon verification, and post-silicon validation. The team is ...

Qualcomm is seeking talented ASIC Design Engineers to join our growing SoC and ASIC Design organization. Successful candidates will have the opportunity to contribute across a variety of projects ...

Principal ASIC Design Engineer Description: Expertise in at least 3 of the following: communication system design, RF radio design, digital ASIC design, applications platforms, and semiconductor ...

Principal ASIC Design Engineer Description: Expertise in at least 3 of the following: communication system design, RF radio design, digital ASIC design, applications platforms, and semiconductor ...

We are now looking for a Senior ASIC Design Engineer to join our System ASIC team! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 fueled the growth of ...

ASIC Design Engineer

Santa Clara, CA · On-site

$126.70 - $190.10/hr

Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience * Master's degree in Science, Engineering ...

$168 - $311/hr

NVIDIA is seeking ASIC Design Engineers to implement the world's leading SoC's and GPU's. This position offers the opportunity to have real impact in a multifaceted, technology-focused company ...

Sr/ ASIC Design Engineer (5+ Years of Experience) DESCRIPTION OF POSITION/DUTIES - * Architect a block of an ASIC and write a microarchitecture specification (MAS) for the block * Collaborate with ...

ASIC Design Engineer

Santa Clara, CA · On-site

$126K - $190K/yr

OR Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience. OR PhD in Science, Engineering, or related ...

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Contract Asic Design Engineer information

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$94K

$150.2K

$202K

How much do contract asic design engineer jobs pay per year?

As of Aug 28, 2026, the average yearly pay for contract asic design engineer in the United States is $150,195.00, according to ZipRecruiter salary data. Most workers in this role earn between $131,500.00 and $180,000.00 per year, depending on experience, location, and employer.

What is the difference between Contract Asic Design Engineer vs Contract FPGA Design Engineer?

AspectContract Asic Design EngineerContract FPGA Design Engineer
Required CredentialsBachelor's/Master's in Electrical Engineering or Computer Engineering, FPGA/ASIC design experienceBachelor's/Master's in Electrical Engineering or Computer Engineering, FPGA/ASIC design experience
Work EnvironmentSemiconductor companies, chip design firms, contract roles in hardware developmentSemiconductor companies, FPGA development firms, contract roles in hardware prototyping
Industry UsageUsed in chip manufacturing, integrated circuit design, hardware developmentUsed in prototyping, hardware acceleration, FPGA-based solutions

The main difference between a Contract Asic Design Engineer and a Contract FPGA Design Engineer lies in their focus areas. Asic engineers work on designing custom chips for mass production, while FPGA engineers develop flexible hardware solutions using programmable logic devices. Both roles require similar educational backgrounds and often overlap in industry applications, but their end goals and tools differ.

More about Contract Asic Design Engineer jobs

What cities are hiring for Contract Asic Design Engineer jobs?

Cities with the most Contract Asic Design Engineer job openings:

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The most popular types of Asic Design Engineer jobs are:

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The top searched job categories for Contract Asic Design Engineer jobs are:

Infographic showing various Contract Asic Design Engineer job openings in the United States as of August 2026, with employment types broken down into 90% Full Time, 7% Part Time, and 3% Contract. Highlights an 81% Physical, 5% Hybrid, and 14% Remote job distribution, with an average salary of $150,195 per year, or $72.2 per hour.

ASIC Design Engineer

Austin, TX • On-site

$130 - $210/hr

Other

Posted 18 days ago


Job description

We’re looking for ASIC design engineers to contribute to and own blocks in the development of the A-0 and A-1 wafer products, across both the XPU, memory chiplet and other dies on the wafer.

Ideal Background:
  • Hands-on experience with multiple advanced node tapeouts
  • Ownership of ASIC design portion of at least one block in multiple advanced node tapeouts
  • Understanding of PPA improvement and what levers exist for each level of the stack
  • Ability to think creatively about methodology for fast design iterations
Nice to Have:
  • Hands-on experience with ASIC design process for large die (ideally reticle max) chips
  • Hands-on experience with ASIC design process for AI chips
  • Hands-on experience with multi-die/multi-chiplet/MCM designs
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