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Contract Asic Design Engineer Jobs (NOW HIRING)

Credo, Inc

Principal ASIC Design Engineer

San Jose, CA · On-site

$180K - $210K/yr

About the Role As a Principal ASIC Design Engineer, you will be responsible for all aspects of front-end ASIC design, including RTL implementation and verification of complex logic blocks. You will ...

Qualcomm

ASIC Design Engineer

Santa Clara, CA · On-site

$126K - $190K/yr

OR Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience. OR PhD in Science, Engineering, or related ...

Credo, Inc

Principal ASIC Design Engineer

San Jose, CA · On-site

$180K - $210K/yr

About the Role As a Principal ASIC Design Engineer, you will be responsible for all aspects of front-end ASIC design, including RTL implementation and verification of complex logic blocks. You will ...

Nvidia

Senior ASIC Design Engineer

Santa Clara, CA · Hybrid

NVIDIA is seeking ASIC Design Engineers to implement the world's leading SoC's and GPU's. This position offers the opportunity to have real impact in a multifaceted, technology-focused company ...

Fermilab

Jr. ASIC Design Engineer

Batavia, NY · Hybrid

$70K - $93K/yr

We are looking for a Junior ASIC Design Engineer to lead and contribute to research activities and engineering work focused on developing custom instrumentation for extreme radiation and/or cryogenic ...

Cornelis Networks

PCIe ASIC Design Engineer

Austin, TX · On-site +1

We're seeking engineers who are energized by working on cutting-edge ASIC design and distributed software systems, and who are motivated to push the boundaries on how AI can transform everything from ...

Nvidia

Senior ASIC Design Engineer

Santa Clara, CA · On-site +1

NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world's leading SoC's and GPU's. This position offers the opportunity to have real impact in a multifaceted ...

Fermilab

Jr. ASIC Design Engineer

Batavia, IL · On-site

$70K - $93K/yr

We are looking for a Junior ASIC Design Engineer to lead and contribute to research activities and engineering work focused on developing custom instrumentation for extreme radiation and/or cryogenic ...

Apple

ASIC Design Engineer

Beaverton, OR · On-site

Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design: - Write microarchitecture and/or design specifications - Design, implement, and debug complex logic ...

Apple

ASIC Design Engineer

Beaverton, OR

Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design: - Write microarchitecture and/or design specifications - Design, implement, and debug complex logic ...

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All JobsContract Asic Design Engineer Jobs

Contract Asic Design Engineer information

See salary details

$94K

$150.2K

$202K

How much do contract asic design engineer jobs pay per year?

As of Jul 18, 2026, the average yearly pay for contract asic design engineer in the United States is $150,195.00, according to ZipRecruiter salary data. Most workers in this role earn between $131,500.00 and $180,000.00 per year, depending on experience, location, and employer.

What is the salary of ASIC design engineer?

The salary of an ASIC design engineer typically ranges from $80,000 to $150,000 annually, depending on experience, location, and company size. Senior engineers with specialized skills in hardware description languages and verification tools may earn higher compensation. Entry-level positions generally start at the lower end of this range.

How much does an ASIC design engineer make?

An ASIC design engineer's salary typically ranges from $80,000 to $150,000 annually, depending on experience, location, and company size. Senior engineers with specialized skills in hardware description languages and verification tools can earn higher compensation, often exceeding $180,000.

Are ASIC design engineers in demand?

ASIC design engineers are in high demand due to the growing need for custom hardware solutions in industries like telecommunications, consumer electronics, and data centers. Skills in hardware description languages such as VHDL or Verilog, along with experience in FPGA prototyping and verification, enhance job prospects in this field.

What engineer makes $500,000 a year?

A contract ASIC design engineer can earn $500,000 or more annually, especially with extensive experience, specialized skills in hardware description languages, and working in high-demand industries like semiconductor or tech companies. Such roles often require advanced knowledge of chip design, verification, and tools like VHDL or Verilog, and may involve contract or consulting arrangements with high compensation packages.

What is the difference between Contract Asic Design Engineer vs Contract FPGA Design Engineer?

AspectContract Asic Design EngineerContract FPGA Design Engineer
Required CredentialsBachelor's/Master's in Electrical Engineering or Computer Engineering, FPGA/ASIC design experienceBachelor's/Master's in Electrical Engineering or Computer Engineering, FPGA/ASIC design experience
Work EnvironmentSemiconductor companies, chip design firms, contract roles in hardware developmentSemiconductor companies, FPGA development firms, contract roles in hardware prototyping
Industry UsageUsed in chip manufacturing, integrated circuit design, hardware developmentUsed in prototyping, hardware acceleration, FPGA-based solutions

The main difference between a Contract Asic Design Engineer and a Contract FPGA Design Engineer lies in their focus areas. Asic engineers work on designing custom chips for mass production, while FPGA engineers develop flexible hardware solutions using programmable logic devices. Both roles require similar educational backgrounds and often overlap in industry applications, but their end goals and tools differ.

More about Contract Asic Design Engineer jobs
What cities are hiring for Contract Asic Design Engineer jobs? Cities with the most Contract Asic Design Engineer job openings:
What are the most commonly searched types of Asic Design Engineer jobs? The most popular types of Asic Design Engineer jobs are:
What states have the most Contract Asic Design Engineer jobs? States with the most job openings for Contract Asic Design Engineer jobs include:
What job categories do people searching Contract Asic Design Engineer jobs look for? The top searched job categories for Contract Asic Design Engineer jobs are:
Contract Asic Design Engineer jobs near you
Infographic showing various Contract Asic Design Engineer job openings in the United States as of July 2026, with employment types broken down into 21% Locum Tenens, 74% Full Time, 1% Part Time, 2% Contract, and 2% Summer. Highlights an 89% Physical, 6% Hybrid, and 5% Remote job distribution, with an average salary of $150,195 per year, or $72.2 per hour.
Principal ASIC Design Engineer

Principal ASIC Design Engineer

Credo, Inc

San Jose, CA • On-site

$180K - $210K/yr

Full-time

This job post has expired today. Applications are no longer accepted.

Job description

Credo is engineering the future of high-speed connectivity for the AI-driven world. With a deeply rooted legacy of innovation and a passion for solving the most complex networking challenges, we deliver industry-leading solutions that power the next generation of cloud, AI, and hyperscale data centers.
Credo is pioneering a systems-level approach to connectivity, integrating hardware, software, and architecture to deliver holistic solutions. This strategy not only differentiates us in the market but also creates significant value for our customers by accelerating deployment, improving performance, and reducing complexity across their infrastructure.
At Credo, you'll be part of a team of world-class technologists and engineers that thrive on pushing the limits of what's possible for some of the world's most important companies. Our portfolio includes cutting edge solutions including our software, optical DSPs, PCIe/CXL products, SerDes IP, and advanced Active Electrical Cables (AECs) all designed for maximum performance, energy efficiency, and scalability.
We foster a culture of technical excellence, collaboration, and continuous learning, where your ideas can shape the future of connectivity. From silicon architects to systems engineers, every role at Credo contributes to solving real-world problems at scale.
Join us and help us architect the next generation of disruptive networking technologies - because at Credo, We Connect.
About the Role
As a Principal ASIC Design Engineer, you will be responsible for all aspects of front-end ASIC design, including RTL implementation and verification of complex logic blocks. You will collaborate with PD, DFT, STA, and integration teams to ensure successful tape-outs and work closely with system teams for chip bring-up and validation.
Responsibilities
  • Design, implement, and debug complex logic blocks.
  • Integrate complex IPs from internal and external vendors.
  • Support front-end integration activities such as Lint, CDC, synthesis, and ECO.
  • Participate in design and code reviews to ensure quality.
  • Develop functional tests/testbenches and run RTL and gate-level simulations.
  • Work with verification, DFT, and physical design engineers to achieve successful tape-outs.
  • Bring up, validate, and debug chip features; collaborate with software, firmware, and systems teams.

Basic Qualifications
  • BS/MS degree in Electrical Engineering or Computer Science.
  • 10+ years of relevant ASIC design experience.
  • Strong understanding of digital logic design and complex synchronous/asynchronous interfaces.
  • Proficiency in Verilog/SystemVerilog RTL design.
  • Knowledge of synthesis and static timing analysis.
  • Experience developing testbenches and test cases; familiarity with UVM.
  • Experience with gate-level simulations, chip bring-up, and validation.
  • Proven track record of successful production tape-outs.

Preferred Qualifications
  • Expertise in scripting languages (Python, Tcl, Perl, Shell).
  • Familiarity with DFT methodology and physical design flow.
  • Hands-on experience with STA and timing closure.
  • Strong problem-solving and planning skills.
  • Excellent communication and collaboration abilities.

The base salary range for this position is $180,000 - $210,000 a year. The base salary ultimately offered is determined through a review of education, experience, training, skills, qualifications, and location. This position is also eligible for a discretionary bonus, equity and a full range of medical and other benefits.
Credo is an Equal Opportunity Employer. We are committed to creating an inclusive environment for all employees and welcome applicants from diverse backgrounds without regard to race, color, religion, gender, sex, sexual orientation, national origin, genetic information, age, disability, veteran status, or any other legally protected basis.
If you have a disability or special need that requires accommodation to navigate our website or complete the application process, email people@credosemi.com.

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