What does a CMOS Layout Design Engineer do?

A CMOS Layout Design Engineer is responsible for designing the physical layout of integrated circuits (ICs) using CMOS (Complementary Metal-Oxide-Semiconductor) technology. They translate circuit schematics into geometric representations that can be fabricated on silicon wafers. Their work involves using specialized software tools to ensure the design meets electrical, performance, and manufacturing requirements. The role requires attention to detail, knowledge of semiconductor processes, and collaboration with circuit designers to optimize layouts for performance, area, and power consumption.