Design Engineer II

This role is for an existing vacancy.

Job Title: Design Engineer II

Location: Montreal, Ottawa, Toronto

Overview

This is an opportunity to join a dynamic and growing team of experienced engineers developing high-performance physical IP for industry-standard protocols.

The successful candidate will be a highly motivated self-starter who is able to work independently to complete assigned tasks within required project timelines with high quality.

The candidate will primarily be responsible for the verification of digital RTL and development of re-usable verification components and environments.

It is also expected that the candidate will contribute to all aspects of digital verification including flow development, test plan development and execution, functional coverage closure, and code coverage closure.

The ideal candidate will have a fundamental understanding of the end-to-end verification flow in order to accurately and efficiently communicate with all members of the technical staff regarding overall project development progress and status.

The most successful candidates will be able to demonstrate excellent command of fundamental logic principles as well as excellent problem solving and communication skills.

The candidate should be able to work as part of a small and focused team of engineers and be able to collaborate successfully as needed with design teams, verification teams, project management, and digital and analog design teams in multiple worldwide geographies.

The Candidate should be willing to work full time in the Montreal, Quebec, Canada office and be willing to travel as required by job function (expectation is 5% travel or less).

Design IP is growing organization within Cadence and our completeIP portfolio can be found herehttp://ip.cadence.com/ipportfolio/ip-portfolio-overview.

Minimum Experience:

• Bachelor of Science in Electrical(EE)/Computer Engineering (CPE) or Computer Science (CSC)
• Understanding of verification architecture and methodologies
• Understanding of Metric Driven Verification
• Understanding of Universal Verification Methodologies
• Understanding of the identification, planning and creation of functional coverage and checks
• Understanding of System Verilog Assertions (SVAs)
• Understanding of digital design flow

Preferred Experience:

• Master of Science in EE/CPE/CSC
• Experience with SystemVerilog UVM coding language is desired
• Experience with scripting languages such as Python, Perl, Ruby, Sed, or Awk is also strongly preferred
• Exposure to Standard Protocol knowledge for any of the following areas: PCIe, USB, SATA, Ethernet, Display Port, HDMI
• Exposure to Formal Verification Technologies
• Exposure to Mixed Signal Design experience
• Experience with Cadence tools experience
• Exposure to Low Power verification experience using CPF or UPF

Cadence is an equal-opportunity employer committed to hiring a diverse workforce.

Titre:Ingenieur de conception II

Localisation: Montreal, Ottawa, Toronto

Description:

Cadence Design Systems est a la recherche de candidats d'excellence pour joindre une equipe experimentee et dynamique d'ingenieurs en charge du developpement d'IP au service des standards de l'industrie.

Le candidat selectionne aura la charge de la verification de modules numeriques RTL et du developpement de modules de verification reutilisables. Le candidat sera aussi amene a contribuer a toutes les phases du processus de verification: elaboration du plan de verification, codage des points de couverture, generation de stimuli et analyse de couverture.

Le candidat devra posseder des connaissances de base des methodes de design et de verification des composantes numeriques.

Le candidat devra etre autonome, dynamique et demontrer de tres bonnes qualites de communication.

Le groupe de design IP est une equipe multidisciplinaire composee d'ingenieurs provenant de divers sites a travers le monde.

Faisant parti du groupe de verification, le candidat sera amene a collaborer avec diverses disciplines et phases de la realisation complete d'IP materiel: design numerique et analogique, design physique, production, etc.

Le groupe de design IP est une organisation grandissante. Le catalogue complet se trouve au site suivant: http://ip.cadence.com/ipportfolio/ip-portfolio-overview.

Experience minimum:

• Baccalaureat en Ingenierie electrique, sciences appliquees ou domaine connexe.
• Comprehension des principes de base de la verification de composantes numeriques.
• Comprehension de base de la verification basees sur les metriques (Metric Driven Verification).
• Connaissance des Methodes de Verification Universelles (UVM).
• Connaissance du langage d'assertions SystemVerilog (SVAs).
• Comprehension de base du flot de design numerique.

Experience recherchee:

• Maitrise en genie electrique, sciences appliquees ou domaine connexe.
• Experience avec le langage de verification SystemVerilog UVM.
• Experience avec differents langages de script tel que Python, Perl, Ruby, etc.
• Connaissance de base des protocoles de transfert de donnees tel que PCIe, USB, SATA, Ethernet, Display Port, HDMI.
• Connaissance de base des techniques de verification formelle.
• Connaissance de base des composantes mixtes (analogiques/numeriques).

Cadence est une employeuse qui souscrit a l'egalite des chances et qui s'engage a embaucher une main-d'oeuvre diversifiee.

The annual salary range for MOUNT-ROYAL (Montreal)is 73,500.00 - 136,500.00 CAD Annual. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location.

Our benefits programs include: paid vacation and holidays, leave of absence programs, Registered Retirement Savings Plan (RRSP), Tax Free Savings (TFSA) plan for post-tax investment savings, Employee Stock Purchase Plan, group health coverage that includes dental, vision and Emotional Wellbeing Support (EAP) benefits for you and your eligible dependents. Cadence also offers employee and dependent Life insurance, and short-term and long-term disability. In addition, Cadence provides Global Travel Medical coverage, Business Travel Accident Insurance, and a funded Lifestyle Spending Account (LSA).

We welcome applications from candidates with disabilities and in equity seeking groups. If you have accessibility needs during the application and interview process, we encourage you to make your needs known.