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Virtual Prototype Design Jobs (NOW HIRING)

Evapco

Product Development Engineer

Taneytown, MD · On-site

$72K - $90K/yr

... virtual and onsite assistance. Key Responsibilities: * New Product Research and Development * Perform R&D laboratory prototype design, construction, and testing for new and improved products

Apple

Cellular DevOps Engineer

San Diego, CA

$120.30K - $210.10K/yr

... virtual prototype, CAD and other teams. Set up, maintain, and improve quality gate CI/CD pre & post-integration pipelines. Develop and maintain the Python infrastructure for pre & post-silicon bring ...

Apple

Cellular DevOps Engineer

San Diego, CA · On-site

$120.30K - $210.10K/yr

... virtual prototype, CAD and other teams. Set up, maintain, and improve quality gate CI/CD pre & post-integration pipelines. Develop and maintain the Python infrastructure for pre & post-silicon bring ...

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How much do virtual prototype design jobs pay per hour?

As of Jun 4, 2026, the average hourly pay for virtual prototype design in the United States is $26.11, according to ZipRecruiter salary data. Most workers in this role earn between $20.19 and $27.64 per hour, depending on experience, location, and employer.

What is the difference between Virtual Prototype Design vs CAD Designer?

AspectVirtual Prototype DesignCAD Designer
Primary FocusCreating digital, functional prototypes of products or systemsDeveloping detailed 2D/3D technical drawings and models
Tools & SoftwareSimulation software, 3D modeling, virtual testing toolsCAD software like AutoCAD, SolidWorks, CATIA
Work EnvironmentProduct development teams, engineering labs, virtual simulation platformsDesign offices, engineering departments, manufacturing firms
Required CredentialsEngineering background, CAD knowledge, simulation skillsDesign or engineering degree, CAD certification

Virtual Prototype Design focuses on creating digital, functional models for testing and validation, often using simulation tools. CAD Designers primarily develop detailed technical drawings and 3D models for manufacturing. While both roles require CAD skills and engineering knowledge, Virtual Prototype Design emphasizes virtual testing and simulation, whereas CAD Design centers on detailed documentation and design creation.

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Virtual Prototype Design jobs near you
Principal Product Engineer - Virtual Protocols

Principal Product Engineer - Virtual Protocols

Cadence Design Systems, Inc.

San Jose, CA • On-site, Remote

$136.50K - $253.50K/yr

Full-time

Medical, Dental, Vision, Retirement, PTO

Posted 23 days ago

Job description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Business Overview
Deliver Emulation and Prototyping assisted verification products using virtualization (SW) technologies to accelerate and shift left SW-driven pre-silicon verification of advanced SoC designs.
Job Description
This Principal Product Engineer position is with the Virtual Protocols Product Engineering Team, responsible for the successful field readiness and customer deployment of our Transaction Based Acceleration and Virtual Emulation-based System Verification products. This position presents exciting opportunities and challenges of becoming an expert in System Level Software Driven Verification use models that leverage advanced protocol engines operating on Cadence's Palladium and Protium Emulation products to enable the critical shift-left of System Level SOC verification and Validation for Cadence customers. This position provides opportunities to expand your software, hardware, and advanced protocol knowledge while engaging with the world's most advanced SOC customers.
Team
The Virtual Protocols Product Engineering team works closely with R&D, the Cadence Field team, and directly with key customers to identify product requirements.
  • You will be an essential partner to the R&D team delivering product feature definition and product feedback.
  • You will be a leveraged asset for the field and marketing teams to demonstrate our product's performance, debugging, and functionality value.
  • You will become a trusted advocate for top Cadence customers helping guide them to the best use of Cadence technologies while also capturing their needs back into R&D.

As part of this team, your responsibilities will include a wide range of activities that will give you the opportunities to sharpen Cadence products and your technical skills across Software development, Hardware Design, debug tools and methodologies, and advanced protocol interfaces.
This team is responsible for the following:
  • Developing, Maintaining, and delivering feature-based training for new products/features
  • Delivering critical knowledge and guidance to customers and field teams enabling customer success using Cadence emulation platforms and products.
  • Deploying new and emerging protocol products to bleeding-edge innovative customers working on advanced SOC and System designs

Position
The Virtual Protocol Principal Product Engineer has the opportunity to be an expert in many different areas based on their interests and career goals. Their responsibilities can be but are not limited to:
  • Using expertise in OS, kernel, and driver SW development to support Cadence VirtualBridge products that combine a Virtual Machine running a production OS with the customer's SOC Design running on Cadence's Palladium emulation or Protium Prototyping platforms.
  • Using Verification methodologies and SW development expertise to help customers utilize Cadence's Accelerated Verification IPs and advanced APIs and verification Methodologies to accelerate and shift-left their pre-silicon SOC verification and System validation Coverage.
  • Using protocol expertise to drive the requirements and deployment of new protocol products and features in crucial industry standard protocols like PCIe, CXL, Ethernet, USB, AMBA
  • Using emulation and prototyping expertise to drive virtual product performance and supporting customers in getting the most out of their Hardware platform investment and meet their validation goals.

Desired Job Skills
  • Protocol knowledge - PCIE, CXL, Ethernet, USB, AMBA (any preferred)
  • Verification Methodologies (UVM SystemVerilog / Virtual Prototyping SystemC / Portable Stimulus)
  • Software development (C/C++ /Object Oriented programming / Linux Kernel/Driver Development)
  • SOC design and verification experience (preferred)
  • Hardware emulation experience (preferred)
  • HDL language knowledge (SystemVerilog, VHDL)
  • Scripting language knowledge (shell, python, perl)
  • Compiler tools (make, gcc/g++)

Education and experience requirements
  • Bachelors degree in Computer Science or Electrical Engineering with a minimum of 7 years of related experience, or Masters Computer Science or Electrical Engineering degree with a minimum of 5 years of related experience

The annual salary range for California is $136,500 to $253,500. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.
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