Principal Verification Engineer * Independently architect UVM based verification environments ... Good experience in System Verilog assertions. * Own the development of test plans, test ...
Principal Verification Engineer * Independently architect UVM based verification environments ... Good experience in System Verilog assertions. * Own the development of test plans, test ...
Firmware Design Engineer
Rocklin, CA · On-site
$100K - $190K/yr
Engineers work on FPGA firmware, embedded firmware, and hardware design projects for customers ... Design FPGA firmware using Verilog (preferred) or VHDL. * Design high-speed digital PCBs utilizing ...
Firmware Design Engineer
Rocklin, CA · On-site
$100K - $190K/yr
Engineers work on FPGA firmware, embedded firmware, and hardware design projects for customers ... Design FPGA firmware using Verilog (preferred) or VHDL. * Design high-speed digital PCBs utilizing ...
Principal Verification Engineer * Independently architect UVM based verification environments ... Good experience in System Verilog assertions. * Own the development of test plans, test ...
Principal Verification Engineer * Independently architect UVM based verification environments ... Good experience in System Verilog assertions. * Own the development of test plans, test ...
Senior FPGA Engineer
Cincinnati, OH · On-site
$106K - $197K/yr
Senior FPGA Engineer ... Please apply ONLY if you have extensive FPGA and Verilog experience United States Citizenship is ...
Senior FPGA Engineer
Cincinnati, OH · On-site
$106K - $197K/yr
Senior FPGA Engineer ... Please apply ONLY if you have extensive FPGA and Verilog experience United States Citizenship is ...
FPGA Electrical Engineer
Cincinnati, OH · On-site
Bachelor''s Degree, Verilog, "C" Programming for embedded systems, Algorithm Development, data structures, Logic Analyzers, oscilloscopes, JTAG/ICE debuggers, protocol analyzers, firmware development ...
FPGA Electrical Engineer
Cincinnati, OH · On-site
Bachelor''s Degree, Verilog, "C" Programming for embedded systems, Algorithm Development, data structures, Logic Analyzers, oscilloscopes, JTAG/ICE debuggers, protocol analyzers, firmware development ...
Principal SerDes Systems Engineer - 18231
Boxborough, MA · On-site
$165K/yr
Hands-on lab testing for high-speed serial links and proficiency in C/Verilog-A/system Verilog. Programming in Python is a plus. Who You Are: * Innovative thinker with a passion for cutting-edge ...
Principal SerDes Systems Engineer - 18231
Boxborough, MA · On-site
$165K/yr
Hands-on lab testing for high-speed serial links and proficiency in C/Verilog-A/system Verilog. Programming in Python is a plus. Who You Are: * Innovative thinker with a passion for cutting-edge ...
VHDL, Verilog, System Verilog, and System Verilog Assertions (SVA), Experience with Formal ... Unix/Linux shell programming, Perl, Java, Makefile, XML, XML DOM, XPath, XSLT, revision management ...
VHDL, Verilog, System Verilog, and System Verilog Assertions (SVA), Experience with Formal ... Unix/Linux shell programming, Perl, Java, Makefile, XML, XML DOM, XPath, XSLT, revision management ...
Principal Firmware Engineer
Eden Prairie, MN · On-site
$140K - $210K/yr
VHDL experience preferred, Verilog experience acceptable. This is in addition to having in-depth ... sound engineering principles in the development of digital design/architecture for the target ...
Principal Firmware Engineer
Eden Prairie, MN · On-site
$140K - $210K/yr
VHDL experience preferred, Verilog experience acceptable. This is in addition to having in-depth ... sound engineering principles in the development of digital design/architecture for the target ...
The candidate should be familiar with C, C++ and Verilog and/or VHDL. Must be able to work with supervision from more experienced engineers and engage in technical dialogue. The candidate should be ...
The candidate should be familiar with C, C++ and Verilog and/or VHDL. Must be able to work with supervision from more experienced engineers and engage in technical dialogue. The candidate should be ...
Silicon Design Verification Engineer-FPGA/System Verilog
San Jose, CA · On-site
$145K/yr
You thrive in a collaborative engineering environment and enjoy solving complex technical ... Proficiency in SystemVerilog, Verilog, C, and C++ * Scripting experience with Python or similar ...
Silicon Design Verification Engineer-FPGA/System Verilog
San Jose, CA · On-site
$145K/yr
You thrive in a collaborative engineering environment and enjoy solving complex technical ... Proficiency in SystemVerilog, Verilog, C, and C++ * Scripting experience with Python or similar ...
IP Design Verification Engineer
California, MO · On-site
$110 - $170/hr
Support mixed‑signal verification using Verilog models of analog IP Requirements * Bachelor's degree in Electrical/Computer Engineering or Computer Science and 5+ years of experience -OR- Master ...
New
IP Design Verification Engineer
California, MO · On-site
$110 - $170/hr
Support mixed‑signal verification using Verilog models of analog IP Requirements * Bachelor's degree in Electrical/Computer Engineering or Computer Science and 5+ years of experience -OR- Master ...
New
Senior Design Verification Engineer
San Diego, CA · On-site
$145K - $178K/yr
We are seeking a skilled Design Verification Engineer with strong expertise in System Verilog (SV) and UVM methodologies to join our team. The ideal candidate will have hands-on experience in ...
Senior Design Verification Engineer
San Diego, CA · On-site
$145K - $178K/yr
We are seeking a skilled Design Verification Engineer with strong expertise in System Verilog (SV) and UVM methodologies to join our team. The ideal candidate will have hands-on experience in ...
Firmware Engineer
Raleigh, NC · On-site
$125K - $180K/yr
As a Firmware Engineer, you will play an active role in every phase of the FPGA development cycle ... In depth knowledge and use of VHDL, Verilog, and System Verilog HDL languages. * Experience and ...
Quick apply
Firmware Engineer
Raleigh, NC · On-site
$125K - $180K/yr
As a Firmware Engineer, you will play an active role in every phase of the FPGA development cycle ... In depth knowledge and use of VHDL, Verilog, and System Verilog HDL languages. * Experience and ...
Firmware Engineer
Raleigh, NC · On-site
$125K - $180K/yr
As a Firmware Engineer, you will play an active role in every phase of the FPGA development cycle ... In depth knowledge and use of VHDL, Verilog, and System Verilog HDL languages. * Experience and ...
Firmware Engineer
Raleigh, NC · On-site
$125K - $180K/yr
As a Firmware Engineer, you will play an active role in every phase of the FPGA development cycle ... In depth knowledge and use of VHDL, Verilog, and System Verilog HDL languages. * Experience and ...
Senior FPGA Engineer #2730
$106K - $197K/yr
Senior FPGA Engineer ... Please apply ONLY if you have extensive FPGA and Verilog experience United States Citizenship is ...
Senior FPGA Engineer #2730
$106K - $197K/yr
Senior FPGA Engineer ... Please apply ONLY if you have extensive FPGA and Verilog experience United States Citizenship is ...
Firmware Engineer
Raleigh, NC · On-site
$125K/yr
As a Firmware Engineer, you will play an active role in every phase of the FPGA development cycle ... In depth knowledge and use of VHDL, Verilog, and System Verilog HDL languages. * Experience and ...
Firmware Engineer
Raleigh, NC · On-site
$125K/yr
As a Firmware Engineer, you will play an active role in every phase of the FPGA development cycle ... In depth knowledge and use of VHDL, Verilog, and System Verilog HDL languages. * Experience and ...
Specialist, FPGA/ASIC Hardware Engineer, Electrical Engineering Job Code: 41606 Job Location ... Developing Verilog HDL targeting Antifuse and enhanced Flash FPGA's. * Performing effective ...
Specialist, FPGA/ASIC Hardware Engineer, Electrical Engineering Job Code: 41606 Job Location ... Developing Verilog HDL targeting Antifuse and enhanced Flash FPGA's. * Performing effective ...
Senior Principal ASIC Design Engineer - Terawave
California, MO · On-site
$180 - $240/hr
Designing and verifying Verilog/System Verilog for complex SOCs (CDC, RDC, LINT). * Implementing ... MS in Electrical Engineering #J-18808-Ljbffr
New
Senior Principal ASIC Design Engineer - Terawave
California, MO · On-site
$180 - $240/hr
Designing and verifying Verilog/System Verilog for complex SOCs (CDC, RDC, LINT). * Implementing ... MS in Electrical Engineering #J-18808-Ljbffr
New
Staff/Sr. Engineer (Verification) Requisition No.: 6200-1023 Type of Position: Regular, Exempt ... Write constrained-random and directed testcases in Verilog/System Verilog/UVM to verify RTL ...
Staff/Sr. Engineer (Verification) Requisition No.: 6200-1023 Type of Position: Regular, Exempt ... Write constrained-random and directed testcases in Verilog/System Verilog/UVM to verify RTL ...
Design Verification Lead Engineer
Austin, TX · On-site
Proficiency in C-shell scripting, Verilog-HDL & System Verilog. * Strong knowledge in SV Assertions ... Exposure to FPGA programming and FPGA tools will be helpful. * Independent, self-motivated with ...
Quick apply
Design Verification Lead Engineer
Austin, TX · On-site
Proficiency in C-shell scripting, Verilog-HDL & System Verilog. * Strong knowledge in SV Assertions ... Exposure to FPGA programming and FPGA tools will be helpful. * Independent, self-motivated with ...
Verilog Engineer information
See salary details
$39K - $48K
3% of jobs
$48K - $56.9K
3% of jobs
$56.9K - $65.9K
4% of jobs
$65.9K - $74.8K
7% of jobs
$74.8K - $83.8K
6% of jobs
$84.5K is the 25th percentile. Wages below this are outliers.
$83.8K - $92.7K
6% of jobs
The median wage is $100.8K / yr.
$92.7K - $101.7K
21% of jobs
$101.7K - $110.6K
4% of jobs
$116.4K is the 75th percentile. Wages above this are outliers.
$110.6K - $119.6K
29% of jobs
$119.6K - $128.5K
2% of jobs
$128.5K - $137.5K
13% of jobs
$39K
$101.8K
$137.5K
How much do verilog engineer jobs pay per year?
What is a Verilog engineer?
A Verilog Engineer is a hardware design professional who specializes in using the Verilog hardware description language (HDL) to design, simulate, and verify digital circuits. They work on developing FPGA and ASIC designs for applications in industries such as telecommunications, automotive, and consumer electronics. Their role often includes writing Verilog code, running simulations, debugging hardware issues, and optimizing performance. They collaborate with systems engineers and verification teams to ensure the correctness and efficiency of digital designs.
What are the key skills and qualifications needed to thrive in the Verilog engineer position, and why are they important?
To thrive as a Verilog Engineer, you need strong proficiency in digital design principles, solid experience with hardware description languages (HDLs) like Verilog, and usually a degree in electrical engineering or a related field. Familiarity with ASIC/FPGA design tools such as ModelSim, Synopsys, or Xilinx Vivado, and certifications in FPGA or hardware design can be advantageous. Attention to detail, strong problem-solving skills, and effective teamwork and communication abilities distinguish top performers in this role. These skills and qualities are crucial to efficiently designing, verifying, and delivering high-performance digital systems that meet project requirements and deadlines.
What are the typical daily responsibilities of a Verilog engineer?
A Verilog Engineer typically spends their day writing and verifying Verilog code to design and simulate digital logic circuits for ASICs or FPGAs. Their responsibilities include reviewing design specifications, collaborating with hardware and software teams, performing code reviews, and troubleshooting issues found during simulation or synthesis. They also document their work and may assist in optimizing designs for performance or resource utilization. Effective communication and teamwork are important, as Verilog Engineers often work closely with cross-functional engineering teams throughout the development cycle.

Other
Re-posted 6 days ago
Job description
Principal Verification Engineer
Job Description:
- Independently architect UVM based verification environments including drivers, monitors, scoreboards, functional checkers, functional coverage.
- Innovative in functional coverage techniques and stress verification with testing all corners of DV - Passing/Failing/Error/breaking scenarios for DUT.
- Own verification at module and/or full chip level.
- Proficiency in System Verilog and advanced UVM methodologies is a must.
- Good experience in System Verilog assertions.
- Own the development of test plans, test environments and test suites used to verify complex Ethernet and Microcontroller SOC products.
- Prior experience as a verification lead is preferred.
- Prior experience of working with and guiding the junior members of the team is required.
Responsibilities:
- Product verification test plan specification
- Drive verification methodologies and practices
- Develop System Verilog verification IP
- Develop chip/block level test environments
- Develop and debug test suites
- Lead and mentor other verification engineers