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Verilog Engineer Jobs (NOW HIRING)

Implement Verilog RTL to meet timing and performance requirements. * Help define, evolve, and support our design methodology. * Mentor junior engineers on performing project tasks and problem solving.

Position: Emulation Engineer Work Location: Austin, TX Payrate: $65.00/hr Duration: Full-time * ... Expertise in Verilog/System Verilog design and simulation. * Proficiency with FPGA synthesis and ...

Principal Verification Engineer

Dallas, TX · On-site

$127K/yr

The Principal Verification Engineer will be responsible for architecting and creating verification environments using System-Verilog and Universal Verification Methodology (UVM) IPs and SoCs with ...

Systems Engineer (VHDL) Location: Linthicum, MD Required Clearance : TS/SCI w/ Full Scope Poly ... Perform VHDL/Verilog coding, simulation, and verification using ModelSim. * Utilize Xilinx tools ...

Systems Engineer (VHDL) Location: Linthicum, MD Required Clearance : TS/SCI w/ Full Scope Poly ... Perform VHDL/Verilog coding, simulation, and verification using ModelSim. * Utilize Xilinx tools ...

Logic design, implementation, and verification using Verilog, System Verilog, and any required programing and scripting languages. * Synthesize and optimize RTL for timing, area and power.

Creating a constrained-random verification environment using System Verilog and UVM * Identifying ... Debugging tests with design engineers to deliver functionally correct design blocks * Closing ...

FPGA Engineer

Cincinnati, OH

$124K - $160K/yr

The primary responsibilities will focus on Verilog FPGA design, System Verilog UVM verification and ... Programming experience in C for embedded systems, including development of algorithms, manipulation ...

New

Systems Engineer (Hardware)

Glen Burnie, MD

$119K - $157K/yr

Systems Engineer (Hardware) Location: Linthicum, MD Required Clearance : TS/SCI w/ CI Poly Salary ... Perform VHDL/Verilog coding, simulation, and verification using ModelSim. * Utilize Xilinx tools ...

Logic design, implementation, and verification using Verilog, System Verilog, and any required programing and scripting languages. Synthesize and optimize RTL for timing, area and power. Developing ...

New

Systems Engineer (Hardware)

Glen Burnie, MD · On-site

$119K - $157K/yr

Systems Engineer (Hardware) Location: Linthicum, MD Required Clearance : TS/SCI w/ CI Poly Salary ... Perform VHDL/Verilog coding, simulation, and verification using ModelSim. * Utilize Xilinx tools ...

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Verilog Engineer information

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$39K

$101.8K

$137.5K

How much do verilog engineer jobs pay per year?

As of Aug 8, 2026, the average yearly pay for verilog engineer in the United States is $101,752.00, according to ZipRecruiter salary data. Most workers in this role earn between $84,000.00 and $116,500.00 per year, depending on experience, location, and employer.

What is a Verilog engineer?

A Verilog Engineer is a hardware design professional who specializes in using the Verilog hardware description language (HDL) to design, simulate, and verify digital circuits. They work on developing FPGA and ASIC designs for applications in industries such as telecommunications, automotive, and consumer electronics. Their role often includes writing Verilog code, running simulations, debugging hardware issues, and optimizing performance. They collaborate with systems engineers and verification teams to ensure the correctness and efficiency of digital designs.

What are the key skills and qualifications needed to thrive in the Verilog engineer position, and why are they important?

To thrive as a Verilog Engineer, you need strong proficiency in digital design principles, solid experience with hardware description languages (HDLs) like Verilog, and usually a degree in electrical engineering or a related field. Familiarity with ASIC/FPGA design tools such as ModelSim, Synopsys, or Xilinx Vivado, and certifications in FPGA or hardware design can be advantageous. Attention to detail, strong problem-solving skills, and effective teamwork and communication abilities distinguish top performers in this role. These skills and qualities are crucial to efficiently designing, verifying, and delivering high-performance digital systems that meet project requirements and deadlines.

What are the typical daily responsibilities of a Verilog engineer?

A Verilog Engineer typically spends their day writing and verifying Verilog code to design and simulate digital logic circuits for ASICs or FPGAs. Their responsibilities include reviewing design specifications, collaborating with hardware and software teams, performing code reviews, and troubleshooting issues found during simulation or synthesis. They also document their work and may assist in optimizing designs for performance or resource utilization. Effective communication and teamwork are important, as Verilog Engineers often work closely with cross-functional engineering teams throughout the development cycle.

More about Verilog Engineer jobs
What cities are hiring for Verilog Engineer jobs? Cities with the most Verilog Engineer job openings:
What are the most commonly searched types of Verilog Engineer jobs? The most popular types of Verilog Engineer jobs are:
What states have the most Verilog Engineer jobs? States with the most job openings for Verilog Engineer jobs include:
What job categories do people searching Verilog Engineer jobs look for? The top searched job categories for Verilog Engineer jobs are:
Infographic showing various Verilog Engineer job openings in the United States as of August 2026, with employment types broken down into 92% Full Time, 2% Part Time, and 6% Contract. Highlights an 87% Physical, 4% Hybrid, and 9% Remote job distribution, with an average salary of $101,752 per year, or $48.9 per hour.

ASIC Design Engineer Technical Lead

Cisco

San Jose, CA • On-site

$186K - $267K/yr

Full-time

Medical, Dental, Vision, Life, Retirement, PTO

Re-posted 5 days ago


Cisco Systems rating

8.0

Company rating: 8.0 out of 10

Based on 42 frontline employees who took The Breakroom Quiz

57th of 156 rated electronics manufacturers


Job description

The application window is expected to close on: 09/01/2026
Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received.
Meet the Team
The Common Hardware Group (CHG) creates innovative hardware platforms central to the AI era, powering Cisco's core Switching, Routing, and Wireless products for organizations globally. Our innovations in silicon, optics, and hardware platforms-like Silicon One-are shaping the technology industry. We're a global team of creative experts, bringing our unique backgrounds and bold ideas to push boundaries and help each other grow. Because full product development-from design to qualification to production-is within our team, we're able to think differently, experiment more, and work quickly. Join us to power the future of the digital world.
Your Impact
  • Participate in and contribute to chip architecture definition and discussions.
  • Author design specifications and participate in micro-architecture specification reviews.
  • Implement Verilog RTL to meet timing and performance requirements.
  • Help define, evolve, and support our design methodology.
  • Mentor junior engineers on performing project tasks and problem solving.
  • Collaborate with the verification team to address design bugs and close code coverage.
  • Work closely with physical design team to close design timing and place-and-route issues.
  • Triage, debug, and root cause simulation, software bring-up, and customer failures.
  • Perform diagnostic and post silicon validation tests in the lab.

Minimum Qualifications
  • Bachelor's degree in Electrical or Computer engineering and 8+ years of ASIC Design experience, or Master's degree in Electrical Engineering or Computer Engineering and 6+ years of ASIC Design experience, or PhD in Electrical Engineering or Computer Engineering + 3 years in ASIC Design experience.
  • Verilog/System Verilog programming experience.
  • Interactive and waveform debug experience.
  • Experience delivering ASIC designs from specification to tape-out.
  • Experience in architecture and micro architecture development.

Preferred Qualifications
  • Experience resolving setup and hold timing violations with RTL modification.
  • Scripting experience (Python, Perl, TCL, shell programming).
  • Demonstrated ability in troubleshooting and debugging.
  • Good written and verbal communication skills.

Why Cisco?
At Cisco, we're revolutionizing how data and infrastructure connect and protect organizations in the AI era - and beyond. We've been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.
Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you'll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere.
We are Cisco, and our power starts with you.
Message to applicants applying to work in the U.S. and/or Canada:
The starting salary range posted for this position is $186,900.00 to $267,700.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits.
Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process.
U.S. employees are offered benefits, subject to Cisco's plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time.
U.S. employees are eligible for paid time away as described below, subject to Cisco's policies:
  • 10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees
  • 1 paid day off for employee's birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco
  • Non-exempt employees** receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees
  • Exempt employees participate in Cisco's flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations)
  • 80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours of unused sick time carried forward from one calendar year to the next
  • Additional paid time away may be requested to deal with critical or emergency issues for family members
  • Optional 10 paid days per full calendar year to volunteer

For non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco's policies.
Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows:
  • .75% of incentive target for each 1% of revenue attainment up to 50% of quota;
  • 1.5% of incentive target for each 1% of attainment between 50% and 75%;
  • 1% of incentive target for each 1% of attainment between 75% and 100%; and
  • Once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation.

For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid.
The applicable full salary ranges for this position, by specific state, are listed below:
New York City Metro Area:
$186,900.00 - $307,800.00
Non-Metro New York state & Washington state:
$166,300.00 - $274,100.00
* For quota-based sales roles on Cisco's sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined.
** Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.

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About Cisco Systems

Sourced by ZipRecruiter

Cisco Systems, a global tech titan based in San Jose, CA, US, operates in the information technology and services industry. Founded in 1984, the company was derived from a project between two computer scientists from Stanford University. They aimed to connect different networks of computer systems at the university, resulting in the first multi-protocol router, and subsequently, the birth of Cisco. As an industry-leading manufacturer of networking hardware and telecommunications equipment, Cisco's product and services range includes routers, switches, firewall devices, and telecommunication technology. The company's mission, "to shape the future of the Internet by creating unprecedented value and opportunity for our customers, employees, investors, and ecosystem partners," is a testament to its pursuit of technology-forward innovation and customer satisfaction.

Industry

Computer and computer peripheral equipment and software wholesalers

Company size

10,000+ Employees

Headquarters location

San Jose, CA, US

Year founded

1984

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