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Verilog Engineer Jobs (NOW HIRING)

CivicMinds, Inc.

ASIC Design Engineer

San Diego, CA · On-site

Creating a constrained-random verification environment using System Verilog and UVM * Identifying ... Debugging tests with design engineers to deliver functionally correct design blocks * Closing ...

WILLCOR Inc

Systems Engineer (Hardware)

Glen Burnie, MD

$119K - $157K/yr

Systems Engineer (Hardware) Location: Linthicum, MD Required Clearance : TS/SCI w/ CI Poly Salary ... Perform VHDL/Verilog coding, simulation, and verification using ModelSim. * Utilize Xilinx tools ...

OSI Engineering, Inc.

Firmware Design Engineer

Rocklin, CA · On-site

$100K - $190K/yr

Engineers work on FPGA firmware, embedded firmware, and hardware design projects for customers ... Design FPGA firmware using Verilog (preferred) or VHDL. * Design high-speed digital PCBs utilizing ...

WILLCOR, Inc.

Systems Engineer (Hardware)

Glen Burnie, MD · On-site

$119K - $157K/yr

Systems Engineer (Hardware) Location: Linthicum, MD Required Clearance : TS/SCI w/ CI Poly Salary ... Perform VHDL/Verilog coding, simulation, and verification using ModelSim. * Utilize Xilinx tools ...

Distro

Hardware Engineer

Cincinnati, OH

$120K - $160K/yr

The primary responsibilities will focus on Verilog FPGA design, System Verilog UVM verification and ... Programming experience in C for embedded systems, including development of algorithms, manipulation ...

Distro

Hardware Engineer

Cincinnati, OH

$120K - $160K/yr

The primary responsibilities will focus on Verilog FPGA design, System Verilog UVM verification and ... Programming experience in C for embedded systems, including development of algorithms, manipulation ...

Superbeo

Design Verification Lead Engineer

Austin, TX · On-site

Proficiency in C-shell scripting, Verilog-HDL & System Verilog. * Strong knowledge in SV Assertions ... Exposure to FPGA programming and FPGA tools will be helpful. * Independent, self-motivated with ...

Distro

Hardware Engineer

Cincinnati, OH · On-site

$120K - $160K/yr

The primary responsibilities will focus on Verilog FPGA design, System Verilog UVM verification and ... Programming experience in C for embedded systems, including development of algorithms, manipulation ...

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Verilog Engineer information

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$39K

$101.8K

$137.5K

How much do verilog engineer jobs pay per year?

As of Jul 18, 2026, the average yearly pay for verilog engineer in the United States is $101,752.00, according to ZipRecruiter salary data. Most workers in this role earn between $84,000.00 and $116,500.00 per year, depending on experience, location, and employer.

What is a Verilog Engineer job?

A Verilog Engineer is a hardware design professional who specializes in using the Verilog hardware description language (HDL) to design, simulate, and verify digital circuits. They work on developing FPGA and ASIC designs for applications in industries such as telecommunications, automotive, and consumer electronics. Their role often includes writing Verilog code, running simulations, debugging hardware issues, and optimizing performance. They collaborate with systems engineers and verification teams to ensure the correctness and efficiency of digital designs.

What are the key skills and qualifications needed to thrive in the Verilog Engineer position, and why are they important?

To thrive as a Verilog Engineer, you need strong proficiency in digital design principles, solid experience with hardware description languages (HDLs) like Verilog, and usually a degree in electrical engineering or a related field. Familiarity with ASIC/FPGA design tools such as ModelSim, Synopsys, or Xilinx Vivado, and certifications in FPGA or hardware design can be advantageous. Attention to detail, strong problem-solving skills, and effective teamwork and communication abilities distinguish top performers in this role. These skills and qualities are crucial to efficiently designing, verifying, and delivering high-performance digital systems that meet project requirements and deadlines.

What are the typical daily responsibilities of a Verilog Engineer?

A Verilog Engineer typically spends their day writing and verifying Verilog code to design and simulate digital logic circuits for ASICs or FPGAs. Their responsibilities include reviewing design specifications, collaborating with hardware and software teams, performing code reviews, and troubleshooting issues found during simulation or synthesis. They also document their work and may assist in optimizing designs for performance or resource utilization. Effective communication and teamwork are important, as Verilog Engineers often work closely with cross-functional engineering teams throughout the development cycle.

More about Verilog Engineer jobs
What cities are hiring for Verilog Engineer jobs? Cities with the most Verilog Engineer job openings:
What are the most commonly searched types of Verilog Engineer jobs? The most popular types of Verilog Engineer jobs are:
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Verilog Engineer jobs near you
Infographic showing various Verilog Engineer job openings in the United States as of July 2026, with employment types broken down into 95% Full Time, 2% Part Time, and 3% Contract. Highlights an 87% Physical, 4% Hybrid, and 9% Remote job distribution, with an average salary of $101,752 per year, or $48.9 per hour.

MTS, DDR Design Verification (AI2487)

SiMa Technologies

San Jose, CA • On-site

$176K - $281K/yr

Full-time

Posted 5 days ago

Job description

Description
Job Title: MTS, DDR Design Verification
Job Location: San Jose, CA (This position requires a full-time, on-site presence in our San Jose, CA office)
Job ID: AI2487
Job Description:
As the DDR Design Verification Engineer, you will participate in definition and develop the verification methodology for SiMa.ai's MLSoC™. You will be responsible for developing DDR test plans, test-benches (drivers, monitors and checkers/scoreboard etc..) and test cases. You will be executing test plans to verify the MLSoC - DDR functionality, performance and coverage analysis. You will work closely with the Architecture, RTL/uArch, and cross-functional teams. Opportunity to participate on DDR bring up on MLSoC Silicon in the lab.
Required Background:
  • BS in Computer Science/EE with 10+ years of experience or MS in computer science/EE with 8+ years of experience in SoC design verification.
  • Experience with block level, cluster level or chip/SoC level verification.
  • Proficiency in system verilog, UVM, constrained random and coverage driven verification methodology.
  • DDR controller and/or DDR-IO verification experience is a must.
  • Very good understanding of LPDDR JDEC specifications preferably for LPDDR5.
  • Good understanding of DDR controller and phy functionality.
  • Experience with development of test bench components, test plans for DDR/LPDDR IP verification.
  • Good system verilog programming, debug and problem solving skills.
  • Scripting languages, python or perl is a plus.

Personal attributes:
Can-do attitude. Strong team player. Curious, creative and good at solving problems. Execution and results-oriented. Self-driven, Thinks Big and is highly accountable. Good communication skills.
The annual salary for this position ranges from $176,200 to $281,900. The actual annual salary offered will depend on several factors, including - among others - job-related skills, experience, technical expertise, qualifications, work location, and business needs. The annual salary range for this position is subject to change and may be adjusted in the future.
In addition to base salary, this role is also eligible for private company equity, and a comprehensive package of employee benefits. Please note that the salary ranges listed for U.S. roles reflect base salary only and do not include equity or other forms of compensation.
EEO Employer: SiMa is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.

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